Searched refs:reg1 (Results 1 – 4 of 4) sorted by relevance
/trusted-firmware-a/plat/mediatek/common/drivers/gpio/ |
A D | mtgpio_common.c | 93 uintptr_t reg1; in mt_gpio_set_spec_pull_pupd() local 101 reg2 = reg1 + (gpio_info.base & 0xf0); in mt_gpio_set_spec_pull_pupd() 105 mmio_write_32(reg1 + SET, (1U << bit)); in mt_gpio_set_spec_pull_pupd() 118 uintptr_t reg1; in mt_gpio_set_pull_pu_pd() local 126 reg2 = reg1 - (gpio_info.base & 0xf0); in mt_gpio_set_pull_pu_pd() 137 mmio_write_32(reg1 + CLR, (1U << bit)); in mt_gpio_set_pull_pu_pd() 157 uintptr_t reg1; in mt_gpio_get_spec_pull_pupd() local 168 reg2 = reg1 + (gpio_info.base & 0xf0); in mt_gpio_get_spec_pull_pupd() 185 uintptr_t reg1; in mt_gpio_get_pull_pu_pd() local 196 reg2 = reg1 - (gpio_info.base & 0xf0); in mt_gpio_get_pull_pu_pd() [all …]
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/trusted-firmware-a/plat/hisilicon/hikey/ |
A D | hisi_dvfs.c | 191 unsigned int reg1 = 0; in acpu_dvfs_freq_ascend() local 326 reg1 = read_reg_mask(PMCTRL_ACPUDESTVOL, 0x7F, in acpu_dvfs_freq_ascend() 334 } while ((reg0 != reg1) || (reg2 != 0x1)); in acpu_dvfs_freq_ascend() 349 reg1 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3, in acpu_dvfs_freq_ascend() 357 } while ((reg1 != cpuext_cfg_val) || in acpu_dvfs_freq_ascend() 401 unsigned int reg1 = 0; in acpu_dvfs_freq_descend() local 573 reg1 = read_reg_mask(PMCTRL_ACPUCLKDIV, 0x3, in acpu_dvfs_freq_descend() 579 } while ((reg0 != cpuext_cfg_val) || (reg1 != acpu_ddr_cfg_val)); in acpu_dvfs_freq_descend() 609 reg1 = read_reg_mask(PMCTRL_ACPUDESTVOL, 0x7F, in acpu_dvfs_freq_descend() 617 } while ((reg0 != reg1) || (reg2 != 0x1)); in acpu_dvfs_freq_descend()
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/trusted-firmware-a/bl32/tsp/aarch64/ |
A D | tsp_entrypoint.S | 35 .macro save_eret_context reg1 reg2 36 mrs \reg1, elr_el1 38 stp \reg1, \reg2, [sp, #-0x10]! 42 .macro restore_eret_context reg1 reg2 44 ldp \reg1, \reg2, [sp], #0x10 45 msr elr_el1, \reg1
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/trusted-firmware-a/include/arch/aarch32/ |
A D | asm_macros.S | 36 .macro ldcopr16 reg1, reg2, coproc, opc1, CRm 37 mrrc \coproc, \opc1, \reg1, \reg2, \CRm 44 .macro stcopr16 reg1, reg2, coproc, opc1, CRm 45 mcrr \coproc, \opc1, \reg1, \reg2, \CRm
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