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Searched refs:target (Results 1 – 25 of 112) sorted by relevance

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/trusted-firmware-a/plat/nvidia/tegra/soc/t186/
A Dplat_psci_handlers.c178 plat_local_state_t target; in tegra_last_cpu_in_cluster() local
183 target = states[pos]; in tegra_last_cpu_in_cluster()
184 if (target != PLAT_MAX_OFF_STATE) { in tegra_last_cpu_in_cluster()
207 if (target == PSTATE_ID_CORE_POWERDN) { in tegra_get_afflvl1_pwr_state()
219 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
224 if (target == PLAT_MAX_OFF_STATE) { in tegra_get_afflvl1_pwr_state()
238 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
246 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
250 return target; in tegra_get_afflvl1_pwr_state()
267 target = PSTATE_ID_SOC_POWERDN; in tegra_soc_get_target_pwr_state()
[all …]
/trusted-firmware-a/drivers/marvell/
A Dccu.c191 uint32_t target; in ccu_temp_win_remove() local
195 target = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in ccu_temp_win_remove()
196 target >>= CCU_TARGET_ID_OFFSET; in ccu_temp_win_remove()
197 target &= CCU_TARGET_ID_MASK; in ccu_temp_win_remove()
202 if ((win->target_id != target) || (win->base_addr != base)) { in ccu_temp_win_remove()
226 uint32_t target; in ccu_dram_target_get() local
228 target = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in ccu_dram_target_get()
229 target >>= CCU_TARGET_ID_OFFSET; in ccu_dram_target_get()
230 target &= CCU_TARGET_ID_MASK; in ccu_dram_target_get()
232 return target; in ccu_dram_target_get()
[all …]
A Dgwin.c132 uint32_t target; in gwin_temp_win_remove() local
136 target = mmio_read_32(GWIN_CR_OFFSET(ap_index, win_id)); in gwin_temp_win_remove()
137 target >>= WIN_TARGET_SHIFT; in gwin_temp_win_remove()
138 target &= WIN_TARGET_MASK; in gwin_temp_win_remove()
144 if (win->target_id != target) { in gwin_temp_win_remove()
A Dio_win.c138 uint32_t target; in iow_temp_win_remove() local
142 target = mmio_read_32(IO_WIN_CR_OFFSET(ap_index, win_id)); in iow_temp_win_remove()
147 if ((win->target_id != target) || (win->base_addr != base)) { in iow_temp_win_remove()
/trusted-firmware-a/plat/nvidia/tegra/soc/t194/
A Dplat_psci_handlers.c187 plat_local_state_t target; in tegra_last_on_cpu_in_cluster() local
192 target = states[pos]; in tegra_last_on_cpu_in_cluster()
193 if (target != PLAT_MAX_OFF_STATE) { in tegra_last_on_cpu_in_cluster()
210 plat_local_state_t target = states[core_pos]; in tegra_get_afflvl1_pwr_state() local
214 if (target == PLAT_MAX_OFF_STATE) { in tegra_get_afflvl1_pwr_state()
231 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
235 return target; in tegra_get_afflvl1_pwr_state()
246 plat_local_state_t target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state() local
251 target = PSTATE_ID_SOC_POWERDN; in tegra_soc_get_target_pwr_state()
256 target = tegra_get_afflvl1_pwr_state(states, ncpu); in tegra_soc_get_target_pwr_state()
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/trusted-firmware-a/lib/libfdt/
A Dfdt_overlay.c557 static int overlay_apply_node(void *fdt, int target, in overlay_apply_node() argument
576 ret = fdt_setprop(fdt, target, name, prop, prop_len); in overlay_apply_node()
586 nnode = fdt_add_subnode(fdt, target, name); in overlay_apply_node()
588 nnode = fdt_subnode_offset(fdt, target, name); in overlay_apply_node()
625 int target; in overlay_merge() local
640 if (target < 0) in overlay_merge()
641 return target; in overlay_merge()
785 target = ret; in overlay_symbol_update()
789 ret = get_path_len(fdt, target); in overlay_symbol_update()
807 target = ret; in overlay_symbol_update()
[all …]
/trusted-firmware-a/plat/marvell/armada/a3k/common/
A Ddram_win.c47 enum cpu_win_target target; member
189 uint32_t base_reg, ctrl_reg, size_reg, enabled, target; in dram_win_map_build() local
194 target = (ctrl_reg & CPU_DEC_CR_WIN_TARGET_MASK) >> in dram_win_map_build()
198 if ((enabled == 0) || (target != DRAM_CPU_DEC_TARGET_NUM)) in dram_win_map_build()
260 ctrl_reg |= (win_cfg->target << CPU_DEC_CR_WIN_TARGET_OFFS); in cpu_win_set()
/trusted-firmware-a/plat/common/
A Dplat_psci_common.c152 plat_local_state_t target = PLAT_MAX_OFF_STATE, temp; in plat_get_target_pwr_state() local
161 if (temp < target) in plat_get_target_pwr_state()
162 target = temp; in plat_get_target_pwr_state()
166 return target; in plat_get_target_pwr_state()
A Dplat_gicv3.c236 void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target) in plat_ic_raise_el3_sgi() argument
239 assert(plat_core_pos_by_mpidr(target) >= 0); in plat_ic_raise_el3_sgi()
245 gicv3_raise_secure_g0_sgi((unsigned int)sgi_num, target); in plat_ic_raise_el3_sgi()
A Dplat_gicv2.c238 void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target) in plat_ic_raise_el3_sgi() argument
244 id = plat_core_pos_by_mpidr(target); in plat_ic_raise_el3_sgi()
/trusted-firmware-a/plat/nvidia/tegra/soc/t210/
A Dplat_psci_handlers.c105 plat_local_state_t target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state() local
113 target = *(states + core_pos); in tegra_soc_get_target_pwr_state()
115 target = *(states + cpu); in tegra_soc_get_target_pwr_state()
117 if ((lvl == MPIDR_AFFLVL1) && (target == PSTATE_ID_CLUSTER_IDLE)) { in tegra_soc_get_target_pwr_state()
131 target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state()
150 target = PSTATE_ID_CLUSTER_IDLE; in tegra_soc_get_target_pwr_state()
171 target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state()
176 (target == PSTATE_ID_SOC_POWERDN)) { in tegra_soc_get_target_pwr_state()
179 target = PSTATE_ID_SOC_POWERDN; in tegra_soc_get_target_pwr_state()
185 return target; in tegra_soc_get_target_pwr_state()
/trusted-firmware-a/drivers/arm/gic/v2/
A Dgicv2_main.c422 unsigned int sgir_val, target; in gicv2_raise_sgi() local
437 target = driver_data->target_masks[proc_num]; in gicv2_raise_sgi()
438 assert(target != 0U); in gicv2_raise_sgi()
440 sgir_val = GICV2_SGIR_VALUE(SGIR_TGT_SPECIFIC, target, sgi_num); in gicv2_raise_sgi()
458 unsigned int target; in gicv2_set_spi_routing() local
476 target = GIC_TARGET_CPU_MASK; in gicv2_set_spi_routing()
479 target = driver_data->target_masks[proc_num]; in gicv2_set_spi_routing()
480 assert(target != 0U); in gicv2_set_spi_routing()
483 gicd_set_itargetsr(driver_data->gicd_base, id, target); in gicv2_set_spi_routing()
A Dgicv2_private.h44 unsigned int target) in gicd_set_itargetsr() argument
46 uint8_t val = target & GIC_TARGET_CPU_MASK; in gicd_set_itargetsr()
/trusted-firmware-a/plat/qti/qtiseclib/inc/
A Dqtiseclib_cb_interface.h39 void qtiseclib_cb_ic_raise_sgi(int sgi_num, u_register_t target);
41 u_register_t target);
/trusted-firmware-a/docs/design_documents/
A Dcmake_framework.rst33 * Host and target system agnostic project.
58 processing, and the target creation, source file description are mixed and
77 The framework provides an API called STGT ('simple target') to describe the
79 libraries are linked, etc. The API wraps the CMake target functions, and also
81 the previous section. A group can be applied onto a target, i.e. a collection of
84 these are global and applied onto each target.
130 Next, we create a target called *fw1* and add the *mem_conf* setting group to
131 it. This means that all source and header files used by the target will have all
132 the parameters declared in the setting group. Then we set the target type to
133 executable, and add some source files. Since the target has the parameters from
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/design_documents/
A Dcmake_framework.rst.txt33 * Host and target system agnostic project.
58 processing, and the target creation, source file description are mixed and
77 The framework provides an API called STGT ('simple target') to describe the
79 libraries are linked, etc. The API wraps the CMake target functions, and also
81 the previous section. A group can be applied onto a target, i.e. a collection of
84 these are global and applied onto each target.
130 Next, we create a target called *fw1* and add the *mem_conf* setting group to
131 it. This means that all source and header files used by the target will have all
132 the parameters declared in the setting group. Then we set the target type to
133 executable, and add some source files. Since the target has the parameters from
/trusted-firmware-a/plat/xilinx/versal/pm_service/
A Dpm_api_sys.h24 enum pm_ret_status pm_req_suspend(uint32_t target,
28 enum pm_ret_status pm_req_wakeup(uint32_t target, uint32_t set_address,
30 enum pm_ret_status pm_set_wakeup_source(uint32_t target, uint32_t device_id,
76 enum pm_ret_status pm_force_powerdown(uint32_t target, uint8_t ack,
A Dpm_api_sys.c191 enum pm_ret_status pm_req_suspend(uint32_t target, uint8_t ack, in pm_req_suspend() argument
198 PM_PACK_PAYLOAD4(payload, LIBPM_MODULE_ID, flag, PM_REQ_SUSPEND, target, in pm_req_suspend()
224 enum pm_ret_status pm_req_wakeup(uint32_t target, uint32_t set_address, in pm_req_wakeup() argument
230 PM_PACK_PAYLOAD5(payload, LIBPM_MODULE_ID, flag, PM_REQ_WAKEUP, target, in pm_req_wakeup()
765 enum pm_ret_status pm_force_powerdown(uint32_t target, uint8_t ack, in pm_force_powerdown() argument
772 target, ack); in pm_force_powerdown()
905 enum pm_ret_status pm_set_wakeup_source(uint32_t target, uint32_t wkup_device, in pm_set_wakeup_source() argument
911 target, wkup_device, enable); in pm_set_wakeup_source()
/trusted-firmware-a/plat/qti/qtiseclib/src/
A Dqtiseclib_cb_interface.c100 void qtiseclib_cb_ic_raise_sgi(int sgi_num, u_register_t target) in qtiseclib_cb_ic_raise_sgi() argument
102 plat_ic_raise_el3_sgi(sgi_num, target); in qtiseclib_cb_ic_raise_sgi()
106 u_register_t target) in qtiseclib_cb_set_spi_routing() argument
110 gic_set_spi_routing(id, irm, target); in qtiseclib_cb_set_spi_routing()
/trusted-firmware-a/plat/qti/common/src/
A Dqti_gic_v3.c129 void gic_set_spi_routing(unsigned int id, unsigned int irm, u_register_t target) in gic_set_spi_routing() argument
131 gicv3_set_spi_routing(id, irm, target); in gic_set_spi_routing()
/trusted-firmware-a/plat/mediatek/mt8173/
A Dplat_pm.c592 plat_local_state_t target = PLAT_MAX_OFF_STATE, temp; in plat_get_target_pwr_state() local
598 if (temp < target) in plat_get_target_pwr_state()
599 target = temp; in plat_get_target_pwr_state()
602 return target; in plat_get_target_pwr_state()
/trusted-firmware-a/plat/xilinx/zynqmp/pm_service/
A Dpm_api_sys.c114 enum pm_ret_status pm_req_suspend(enum pm_node_id target, in pm_req_suspend() argument
121 PM_PACK_PAYLOAD5(payload, PM_REQ_SUSPEND, target, ack, latency, state); in pm_req_suspend()
144 enum pm_ret_status pm_req_wakeup(enum pm_node_id target, in pm_req_wakeup() argument
158 PM_PACK_PAYLOAD5(payload, PM_REQ_WAKEUP, target, encoded_address, in pm_req_wakeup()
175 enum pm_ret_status pm_force_powerdown(enum pm_node_id target, in pm_force_powerdown() argument
181 PM_PACK_PAYLOAD3(payload, PM_FORCE_POWERDOWN, target, ack); in pm_force_powerdown()
223 enum pm_ret_status pm_set_wakeup_source(enum pm_node_id target, in pm_set_wakeup_source() argument
229 PM_PACK_PAYLOAD4(payload, PM_SET_WAKEUP_SOURCE, target, wkup_node, in pm_set_wakeup_source()
/trusted-firmware-a/lib/compiler-rt/builtins/
A Dassembly.h149 #define DEFINE_COMPILERRT_FUNCTION_ALIAS(name, target) \ argument
153 .set SYMBOL_NAME(name), SYMBOL_NAME(target) SEPARATOR
/trusted-firmware-a/docs/build/TF-A_2.5/_sources/getting_started/
A Dtools-build.rst.txt14 The TF-A build system provides the make target ``fip`` to create a FIP file
114 ``fip`` make target is specified and TBB is enabled (as described in the
123 'cert_create' tool can be built with the following command. Note that the target
144 ``fip`` make target is specified, DECRYPTION_SUPPORT and TBB are enabled, but
/trusted-firmware-a/docs/getting_started/
A Dtools-build.rst14 The TF-A build system provides the make target ``fip`` to create a FIP file
114 ``fip`` make target is specified and TBB is enabled (as described in the
123 'cert_create' tool can be built with the following command. Note that the target
144 ``fip`` make target is specified, DECRYPTION_SUPPORT and TBB are enabled, but

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