| /trusted-firmware-a/drivers/brcm/emmc/ |
| A D | emmc_chal_sd.c | 82 uint32_t time = 0; in chal_sd_set_power() local
109 } while (time++ < EMMC_CARD_DETECT_TIMEOUT_MS); in chal_sd_set_power()
111 if (time >= EMMC_CARD_DETECT_TIMEOUT_MS) { in chal_sd_set_power()
130 time = 0; in chal_sd_set_power()
143 } while (time++ < EMMC_CMD_TIMEOUT_MS); in chal_sd_set_power()
145 if (time >= EMMC_CMD_TIMEOUT_MS) { in chal_sd_set_power()
151 VERBOSE("EMMC: Dummy Command delay: %dms\n", time); in chal_sd_set_power()
617 uint32_t time; in chal_sd_set_clock() local
654 time = 0; in chal_sd_set_clock()
666 if (time >= EMMC_CLOCK_SETTING_TIMEOUT_MS) in chal_sd_set_clock()
[all …]
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| /trusted-firmware-a/drivers/nxp/ddr/nxp-ddr/ |
| A D | ddr.c | 842 uint64_t time __unused; in dram_init()
873 time = get_timer_val(time_base); in dram_init()
874 INFO("Time after parsing SPD %" PRIu64 " ms\n", time); in dram_init()
914 time = get_timer_val(time_base); in dram_init()
915 INFO("Time before programming controller %" PRIu64 " ms\n", time); in dram_init()
927 time = get_timer_val(time_base); in dram_init()
928 INFO("Time used by DDR driver %" PRIu64 " ms\n", time); in dram_init()
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| /trusted-firmware-a/plat/nvidia/tegra/soc/t186/drivers/include/ |
| A D | mce_private.h | 109 uint32_t time);
226 int32_t ari_update_crossover_time(uint32_t ari_base, uint32_t type, uint32_t time);
249 int32_t nvg_update_crossover_time(uint32_t ari_base, uint32_t type, uint32_t time);
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| /trusted-firmware-a/docs/components/ |
| A D | ffa-manifest-binding.rst | 80 any address chosen at boot time.
124 scheduler. If so, run-time EL must be EL1.
126 - run-time-model
128 - Run time model that the SPM must enforce for this SP:
133 - time-slice-mem
136 partition manager to time slice long running memory management functions.
|
| A D | xlat-tables-lib-v2-design.rst | 12 #. Statically allocate translation tables and populate them (at run-time) based
26 #. Support for changing memory attributes of memory regions at run-time.
100 run-time.
197 - *Dynamic regions* can be added or removed any time.
203 period of time, after which the memory may be discarded and reclaimed. For
204 example, a memory region that is only required at boot time while the system is
211 arbitrary memory location. The user is still required to declare at compile-time
266 Because static regions are added early on at boot time and are all in the
335 information of all the regions that are mapped at any given time. Whenever there
350 one go, rather than having to edit them every time while the MMU is disabled.
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| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/components/ |
| A D | ffa-manifest-binding.rst.txt | 80 any address chosen at boot time.
124 scheduler. If so, run-time EL must be EL1.
126 - run-time-model
128 - Run time model that the SPM must enforce for this SP:
133 - time-slice-mem
136 partition manager to time slice long running memory management functions.
|
| A D | xlat-tables-lib-v2-design.rst.txt | 12 #. Statically allocate translation tables and populate them (at run-time) based
26 #. Support for changing memory attributes of memory regions at run-time.
100 run-time.
197 - *Dynamic regions* can be added or removed any time.
203 period of time, after which the memory may be discarded and reclaimed. For
204 example, a memory region that is only required at boot time while the system is
211 arbitrary memory location. The user is still required to declare at compile-time
266 Because static regions are added early on at boot time and are all in the
335 information of all the regions that are mapped at any given time. Whenever there
350 one go, rather than having to edit them every time while the MMU is disabled.
|
| /trusted-firmware-a/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| A D | nvg.c | 89 int32_t nvg_update_crossover_time(uint32_t ari_base, uint32_t type, uint32_t time) in nvg_update_crossover_time() argument
107 (uint64_t)type), (uint64_t)time); in nvg_update_crossover_time()
|
| /trusted-firmware-a/fdts/ |
| A D | stm32mp157c-ed1.dts | 64 i2c-scl-rising-time-ns = <185>;
65 i2c-scl-falling-time-ns = <20>;
182 power-off-time-sec = <10>;
|
| A D | stm32mp15xx-osd32.dtsi | 13 i2c-scl-rising-time-ns = <185>;
14 i2c-scl-falling-time-ns = <20>;
|
| A D | n1sdp-single-chip.dts | 67 i2c-sda-hold-time-ns = <500>;
|
| A D | stm32mp157a-avenger96.dts | 41 i2c-scl-rising-time-ns = <185>;
42 i2c-scl-falling-time-ns = <20>;
|
| A D | stm32mp157c-odyssey-som.dtsi | 61 i2c-scl-rising-time-ns = <185>;
62 i2c-scl-falling-time-ns = <20>;
|
| A D | stm32mp15xx-dkx.dtsi | 51 i2c-scl-rising-time-ns = <185>;
52 i2c-scl-falling-time-ns = <20>;
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/perf/ |
| A D | psci-performance-juno.rst.txt | 61 ``PSCI_ENTRY`` refers to the time taken from entering the TF PSCI implementation
66 ``PSCI_EXIT`` refers to the time taken from the point the hardware exits the low
113 The ``CFLUSH_OVERHEAD`` time for CPU 5 is a lot larger than that for CPU 3
176 The ``CFLUSH_OVERHEAD`` time for CPU 4 is a lot larger than those for the little
249 The ``CFLUSH_OVERHEAD`` time for CPU 4 is a lot larger than those for the little
284 We suspect the time for lead CPU 4 is shorter than CPU 5 due to subtle cache
|
| /trusted-firmware-a/docs/perf/ |
| A D | psci-performance-juno.rst | 61 ``PSCI_ENTRY`` refers to the time taken from entering the TF PSCI implementation
66 ``PSCI_EXIT`` refers to the time taken from the point the hardware exits the low
113 The ``CFLUSH_OVERHEAD`` time for CPU 5 is a lot larger than that for CPU 3
176 The ``CFLUSH_OVERHEAD`` time for CPU 4 is a lot larger than those for the little
249 The ``CFLUSH_OVERHEAD`` time for CPU 4 is a lot larger than those for the little
284 We suspect the time for lead CPU 4 is shorter than CPU 5 due to subtle cache
|
| /trusted-firmware-a/plat/nxp/soc-lx2160a/ |
| A D | soc.def | 47 # In IMAGE_BL2, compile time flag for handling Cache coherency
82 # for DDR PHY images scratch pad region during BL2 run time)
|
| /trusted-firmware-a/plat/arm/board/fvp/fdts/ |
| A D | optee_sp_manifest.dts | 30 run-time-model = <1>; /* SP pre-emptible. */
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/threat_model/ |
| A D | threat_model_spm.rst.txt | 40 - Secure partitions are statically provisioned at boot time.
41 - Focus on the run-time part of the life-cycle (no specific emphasis on boot
42 time, factory firmware provisioning, firmware udpate etc.)
108 - Bootloaders (in particular BL1/BL2 if using TF-A) and run-time BL31 are
291 | | guidance on those state transitions (run-time |
360 | ``Mitigations`` | A platform may prefer assigning boot time, |
484 | | Further FF-A v1.1 guidance about run time models |
603 | | Bounding the time for operations to complete can |
|
| /trusted-firmware-a/docs/threat_model/ |
| A D | threat_model_spm.rst | 40 - Secure partitions are statically provisioned at boot time.
41 - Focus on the run-time part of the life-cycle (no specific emphasis on boot
42 time, factory firmware provisioning, firmware udpate etc.)
108 - Bootloaders (in particular BL1/BL2 if using TF-A) and run-time BL31 are
291 | | guidance on those state transitions (run-time |
360 | ``Mitigations`` | A platform may prefer assigning boot time, |
484 | | Further FF-A v1.1 guidance about run time models |
603 | | Bounding the time for operations to complete can |
|
| /trusted-firmware-a/docs/design/ |
| A D | alt-boot-flows.rst | 53 run-time.
71 is complete, TF-A simply jumps to a BL33 base address provided at build time.
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/design/ |
| A D | alt-boot-flows.rst.txt | 53 run-time.
71 is complete, TF-A simply jumps to a BL33 base address provided at build time.
|
| /trusted-firmware-a/docs/security_advisories/ |
| A D | security-advisory-tfv-6.rst | 36 At the time of writing, no vulnerable patterns have been observed in upstream TF
76 This includes the time spent in test code conforming to the SMC Calling
105 compile time if they do not require them. `Pull Request #1240`_ disables the
|
| /trusted-firmware-a/docs/build/TF-A_2.5/_sources/security_advisories/ |
| A D | security-advisory-tfv-6.rst.txt | 36 At the time of writing, no vulnerable patterns have been observed in upstream TF
76 This includes the time spent in test code conforming to the SMC Calling
105 compile time if they do not require them. `Pull Request #1240`_ disables the
|
| /trusted-firmware-a/plat/nxp/soc-ls1028a/ |
| A D | soc.def | 41 # In IMAGE_BL2, compile time flag for handling Cache coherency
|