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Searched refs:win (Results 1 – 25 of 34) sorted by relevance

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/trusted-firmware-a/drivers/marvell/
A Dgwin.c41 (0x10 * (win)))
43 (0x10 * (win)))
45 (0x10 * (win)))
61 win->win_size = ALIGN_UP(win->win_size, GWIN_ALIGNMENT_64M); in gwin_check()
73 if ((win->target_id & WIN_TARGET_MASK) != win->target_id) { in gwin_enable_window()
79 end_addr = (win->base_addr + win->win_size - 1); in gwin_enable_window()
116 gwin_check(win); in gwin_temp_win_insert()
118 win++; in gwin_temp_win_insert()
150 win++; in gwin_temp_win_remove()
182 struct addr_map_win *win; in init_gwin() local
[all …]
A Damb_adec.c29 #define AMB_WIN_CR_OFFSET(win) (amb_base + 0x0 + (0x8 * win)) argument
35 #define AMB_WIN_BASE_OFFSET(win) (amb_base + 0x4 + (0x8 * win)) argument
49 if (win->base_addr > AMB_BASE_ADDR_MASK) { in amb_check_win()
51 win_num, win->base_addr); in amb_check_win()
52 win->base_addr = AMB_BASE_ADDR_MASK; in amb_check_win()
67 if (!IS_POWER_OF_2(win->win_size)) { in amb_check_win()
69 win_num, win->win_size); in amb_check_win()
70 win->win_size = ROUND_UP_TO_POW_OF_2(win->win_size); in amb_check_win()
121 struct addr_map_win *win; in init_amb_adec() local
149 amb_check_win(win, win_id); in init_amb_adec()
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A Dio_win.c35 (0x10 * win))
37 (0x10 * win))
39 (0x10 * win))
49 win->base_addr = ALIGN_UP(win->base_addr, IO_WIN_ALIGNMENT_1M); in io_win_check()
56 win->win_size = ALIGN_UP(win->win_size, IO_WIN_ALIGNMENT_1M); in io_win_check()
68 if (win->target_id < 0 || win->target_id >= MVEBU_IO_WIN_MAX_WINS) { in io_win_enable_window()
79 end_addr = (win->base_addr + win->win_size - 1); in io_win_enable_window()
121 io_win_check(win); in iow_temp_win_insert()
123 win++; in iow_temp_win_insert()
147 if ((win->target_id != target) || (win->base_addr != base)) { in iow_temp_win_remove()
[all …]
A Diob.c37 #define IOB_WIN_CR_OFFSET(win) (iob_base + 0x0 + (0x20 * win)) argument
41 #define IOB_WIN_SCR_OFFSET(win) (iob_base + 0x4 + (0x20 * win)) argument
47 #define IOB_WIN_ALR_OFFSET(win) (iob_base + 0x8 + (0x20 * win)) argument
48 #define IOB_WIN_AHR_OFFSET(win) (iob_base + 0xC + (0x20 * win)) argument
50 #define IOB_WIN_DIOB_CR_OFFSET(win) (iob_base + 0x10 + (0x20 * win)) argument
60 win->base_addr = ALIGN_UP(win->base_addr, IOB_WIN_ALIGNMENT); in iob_win_check()
64 win->base_addr); in iob_win_check()
69 win->win_size = ALIGN_UP(win->win_size, IOB_WIN_ALIGNMENT); in iob_win_check()
93 end_addr = (win->base_addr + win->win_size - 1); in iob_enable_win()
167 struct addr_map_win *win; in init_iob() local
[all …]
A Dccu.c64 0x90 + 4 * (win))
104 win->base_addr = ALIGN_UP(win->base_addr, CCU_WIN_ALIGNMENT); in ccu_win_check()
111 win->win_size = ALIGN_UP(win->win_size, CCU_WIN_ALIGNMENT); in ccu_win_check()
134 end_addr = (win->base_addr + win->win_size - 1); in ccu_enable_win()
175 ccu_win_check(win); in ccu_temp_win_insert()
177 win++; in ccu_temp_win_insert()
202 if ((win->target_id != target) || (win->base_addr != base)) { in ccu_temp_win_remove()
208 win++; in ccu_temp_win_remove()
273 ccu_win_check(win); in ccu_dram_win_config()
383 ccu_win_check(win); in init_ccu()
[all …]
/trusted-firmware-a/include/drivers/marvell/
A Dccu.h18 #define CCU_WIN_CR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x0 + \ argument
19 (0x10 * win))
23 #define CCU_WIN_SCR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x4 + \ argument
24 (0x10 * win))
28 #define CCU_WIN_ALR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x8 + \ argument
29 (0x10 * win))
30 #define CCU_WIN_AHR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0xC + \ argument
31 (0x10 * win))
41 void ccu_win_check(struct addr_map_win *win);
43 void ccu_temp_win_insert(int ap_index, struct addr_map_win *win, int size);
[all …]
A Dgwin.h16 void gwin_temp_win_insert(int ap_index, struct addr_map_win *win, int size);
17 void gwin_temp_win_remove(int ap_index, struct addr_map_win *win, int size);
A Dio_win.h16 void iow_temp_win_insert(int ap_index, struct addr_map_win *win, int size);
17 void iow_temp_win_remove(int ap_index, struct addr_map_win *win, int size);
/trusted-firmware-a/plat/marvell/octeontx/otx2/t91/t9130/board/
A Dmarvell_plat_config.c26 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
31 *win = amb_memory_map_cp0; in marvell_get_amb_memory_map()
38 *win = 0; in marvell_get_amb_memory_map()
82 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
83 if (*win == NULL) in marvell_get_io_win_memory_map()
132 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
136 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
140 *win = iob_memory_map_cp2; in marvell_get_iob_memory_map()
145 *win = 0; in marvell_get_iob_memory_map()
173 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
[all …]
/trusted-firmware-a/plat/marvell/octeontx/otx2/t91/t9130_cex7_eval/board/
A Dmarvell_plat_config.c32 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
37 *win = amb_memory_map_cp0; in marvell_get_amb_memory_map()
41 *win = amb_memory_map_cp1; in marvell_get_amb_memory_map()
47 *win = 0; in marvell_get_amb_memory_map()
105 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
106 if (*win == NULL) in marvell_get_io_win_memory_map()
163 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
167 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
171 *win = iob_memory_map_cp2; in marvell_get_iob_memory_map()
176 *win = 0; in marvell_get_iob_memory_map()
[all …]
/trusted-firmware-a/plat/marvell/armada/a8k/a70x0_mochabin/board/
A Dmarvell_plat_config.c28 int marvell_get_amb_memory_map(struct addr_map_win **win, in marvell_get_amb_memory_map() argument
31 *win = amb_memory_map; in marvell_get_amb_memory_map()
32 if (*win == NULL) in marvell_get_amb_memory_map()
59 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
62 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
63 if (*win == NULL) in marvell_get_io_win_memory_map()
89 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
92 *win = iob_memory_map; in marvell_get_iob_memory_map()
124 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
127 *win = ccu_memory_map; in marvell_get_ccu_memory_map()
/trusted-firmware-a/plat/marvell/armada/a8k/a80x0_mcbin/board/
A Dmarvell_plat_config.c60 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
63 *win = amb_memory_map; in marvell_get_amb_memory_map()
64 if (*win == NULL) in marvell_get_amb_memory_map()
98 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
99 if (*win == NULL) in marvell_get_io_win_memory_map()
136 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
141 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
145 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
150 *win = 0; in marvell_get_iob_memory_map()
181 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
[all …]
/trusted-firmware-a/plat/marvell/armada/a8k/a80x0_puzzle/board/
A Dmarvell_plat_config.c60 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
63 *win = amb_memory_map; in marvell_get_amb_memory_map()
64 if (*win == NULL) in marvell_get_amb_memory_map()
102 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
103 if (*win == NULL) in marvell_get_io_win_memory_map()
140 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
145 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
149 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
154 *win = 0; in marvell_get_iob_memory_map()
182 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
[all …]
/trusted-firmware-a/plat/marvell/armada/a8k/a80x0/board/
A Dmarvell_plat_config.c26 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
29 *win = amb_memory_map; in marvell_get_amb_memory_map()
30 if (*win == NULL) in marvell_get_amb_memory_map()
65 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
68 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
69 if (*win == NULL) in marvell_get_io_win_memory_map()
111 *win = iob_memory_map_cp0; in marvell_get_iob_memory_map()
115 *win = iob_memory_map_cp1; in marvell_get_iob_memory_map()
120 *win = 0; in marvell_get_iob_memory_map()
151 int marvell_get_ccu_memory_map(int ap, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
[all …]
/trusted-firmware-a/plat/marvell/armada/a8k/a70x0_amc/board/
A Dmarvell_plat_config.c23 int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_amb_memory_map() argument
26 *win = amb_memory_map; in marvell_get_amb_memory_map()
27 if (*win == NULL) in marvell_get_amb_memory_map()
54 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
57 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
58 if (*win == NULL) in marvell_get_io_win_memory_map()
78 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
81 *win = iob_memory_map; in marvell_get_iob_memory_map()
113 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
116 *win = ccu_memory_map; in marvell_get_ccu_memory_map()
/trusted-firmware-a/plat/marvell/armada/a8k/a70x0/board/
A Dmarvell_plat_config.c26 int marvell_get_amb_memory_map(struct addr_map_win **win, in marvell_get_amb_memory_map() argument
29 *win = amb_memory_map; in marvell_get_amb_memory_map()
30 if (*win == NULL) in marvell_get_amb_memory_map()
57 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_io_win_memory_map() argument
60 *win = io_win_memory_map; in marvell_get_io_win_memory_map()
61 if (*win == NULL) in marvell_get_io_win_memory_map()
87 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, in marvell_get_iob_memory_map() argument
90 *win = iob_memory_map; in marvell_get_iob_memory_map()
122 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win, in marvell_get_ccu_memory_map() argument
125 *win = ccu_memory_map; in marvell_get_ccu_memory_map()
/trusted-firmware-a/drivers/marvell/mc_trustzone/
A Dmc_trustzone.c32 void tz_enable_win(int ap_index, const struct addr_map_win *win, int win_id) in tz_enable_win() argument
35 uint32_t val, base = win->base_addr; in tz_enable_win()
43 tz_size = fls(TZ_SIZE(win->win_size)); in tz_enable_win()
46 __func__, win->win_size, tz_size); in tz_enable_win()
56 win->base_addr, base); in tz_enable_win()
59 val = base | (tz_size << 7) | win->target_id | TZ_VALID; in tz_enable_win()
62 __func__, base, (tz_size << 7), win->target_id, val); in tz_enable_win()
71 (win->base_addr >> 32)); in tz_enable_win()
A Dmc_trustzone.h25 void tz_enable_win(int ap_index, const struct addr_map_win *win, int win_id);
/trusted-firmware-a/plat/marvell/armada/a3k/common/
A Dio_addr_dec.c14 #define MVEBU_DEC_WIN_CTRL_REG(base, win, off) (MVEBU_REGS_BASE + (base) + \ argument
15 (win) * (off))
16 #define MVEBU_DEC_WIN_BASE_REG(base, win, off) (MVEBU_REGS_BASE + (base) + \ argument
17 (win) * (off) + 0x4)
18 #define MVEBU_DEC_WIN_REMAP_REG(base, win, off) (MVEBU_REGS_BASE + (base) + \ argument
19 (win) * (off) + 0x8)
84 struct dram_win *win; in set_io_addr_dec() local
107 for (id = 0; id < win_map->dram_win_num; id++, win++) { in set_io_addr_dec()
108 win = &win_map->dram_windows[id]; in set_io_addr_dec()
109 set_io_addr_dec_win(id, win->base_addr, win->win_size, dec_win); in set_io_addr_dec()
A Ddram_win.c188 struct dram_win *win; in dram_win_map_build() local
201 win = win_map->dram_windows + win_map->dram_win_num; in dram_win_map_build()
205 win->base_addr = (base_reg & CPU_DEC_BR_BASE_MASK) >> in dram_win_map_build()
207 win->base_addr *= CPU_DEC_CR_WIN_SIZE_ALIGNMENT; in dram_win_map_build()
214 win->win_size = (size_reg & CPU_DEC_CR_WIN_SIZE_MASK) >> in dram_win_map_build()
216 win->win_size = (win->win_size + 1) * in dram_win_map_build()
A Dmarvell_plat_config.c27 int marvell_get_io_dec_win_conf(struct dec_win_config **win, uint32_t *size) in marvell_get_io_dec_win_conf() argument
29 *win = io_dec_win_conf; in marvell_get_io_dec_win_conf()
/trusted-firmware-a/include/plat/marvell/armada/a8k/common/
A Darmada_common.h119 int marvell_get_amb_memory_map(struct addr_map_win **win,
121 int marvell_get_io_win_memory_map(int ap_idx, struct addr_map_win **win,
123 int marvell_get_iob_memory_map(struct addr_map_win **win,
125 int marvell_get_ccu_memory_map(int ap_idx, struct addr_map_win **win,
/trusted-firmware-a/docs/build/TF-A_2.5/_static/js/
A Dtheme.js1 …win:null,winScroll:!1,winResize:!1,linkScroll:!1,winPosition:0,winHeight:null,docHeight:null,isRun…
/trusted-firmware-a/plat/marvell/armada/a8k/common/include/
A Da8k_plat_def.h70 #define MVEBU_AP_MC_TRUSTZONE_REG_LOW(ap, win) (MVEBU_REGS_BASE_AP(ap) + \ argument
71 0x20080 + ((win) * 0x8))
72 #define MVEBU_AP_MC_TRUSTZONE_REG_HIGH(ap, win) (MVEBU_REGS_BASE_AP(ap) + \ argument
73 0x20084 + ((win) * 0x8))
/trusted-firmware-a/include/plat/marvell/armada/a3k/common/
A Darmada_common.h15 int marvell_get_io_dec_win_conf(struct dec_win_config **win, uint32_t *size);

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