Searched refs:wrlvl_cntl (Results 1 – 5 of 5) sorted by relevance
49 regs->wrlvl_cntl[0] = ((wrlvl_en & U(0x1)) << 31U) | in cal_ddr_wrlvl_cntl()56 regs->wrlvl_cntl[1] = popts->wrlvl_ctl_2; in cal_ddr_wrlvl_cntl()57 regs->wrlvl_cntl[2] = popts->wrlvl_ctl_3; in cal_ddr_wrlvl_cntl()58 debug("wrlvl_cntl[0] = 0x%x\n", regs->wrlvl_cntl[0]); in cal_ddr_wrlvl_cntl()59 debug("wrlvl_cntl[1] = 0x%x\n", regs->wrlvl_cntl[1]); in cal_ddr_wrlvl_cntl()60 debug("wrlvl_cntl[2] = 0x%x\n", regs->wrlvl_cntl[2]); in cal_ddr_wrlvl_cntl()
46 .wrlvl_cntl[0] = U(0x8675F605),47 .wrlvl_cntl[1] = U(0x6070700),48 .wrlvl_cntl[2] = U(0x0000008),
271 ddr_out32(&ddr->wrlvl_cntl, regs->wrlvl_cntl[0]); in ddrc_set_regs()278 if (regs->wrlvl_cntl[1] != 0) { in ddrc_set_regs()279 ddr_out32(&ddr->ddr_wrlvl_cntl_2, regs->wrlvl_cntl[1]); in ddrc_set_regs()281 if (regs->wrlvl_cntl[2] != 0) { in ddrc_set_regs()282 ddr_out32(&ddr->ddr_wrlvl_cntl_3, regs->wrlvl_cntl[2]); in ddrc_set_regs()
52 unsigned int wrlvl_cntl; /* write leveling control*/ member
66 unsigned int wrlvl_cntl[3]; member
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