/trusted-firmware-a/plat/nvidia/tegra/include/ |
A D | plat_macros.S | 32 mov_imm x16, TEGRA_GICC_BASE 37 ldr w8, [x16, #GICC_HPPIR] 38 ldr w9, [x16, #GICC_AHPPIR] 39 ldr w10, [x16, #GICC_CTLR] 44 mov_imm x16, TEGRA_GICD_BASE 45 add x7, x16, #GICD_ISPENDR 49 sub x4, x7, x16
|
/trusted-firmware-a/lib/romlib/templates/ |
A D | wrapper.S | 9 mov x16, #${function_offset} 11 add x16, x16, x17 12 br x16
|
A D | wrapper_bti.S | 10 mov x16, #${function_offset} 12 add x16, x16, x17 13 br x16
|
/trusted-firmware-a/lib/el3_runtime/aarch64/ |
A D | context.S | 80 mrs x16, ICC_SRE_EL2 99 mrs x16, sp_el2 115 mrs x16, vttbr_el2 154 mrs x16, HFGITR_EL2 178 mrs x16, vncr_el2 274 msr sp_el2, x16 290 msr vttbr_el2, x16 353 msr vncr_el2, x16 395 mrs x16, tcr_el1 467 mrs x16, TFSR_EL1 [all …]
|
/trusted-firmware-a/plat/arm/board/fvp/include/ |
A D | plat_macros.S | 27 ubfx x16, x16, #V2M_SYS_ID_BLD_SHIFT, #4 33 mov_imm x16, BASE_GICD_BASE 37 mov_imm x16, VE_GICD_BASE
|
/trusted-firmware-a/plat/amlogic/common/include/ |
A D | plat_macros.S | 46 mov_imm x16, AML_GICD_BASE 48 add x7, x16, #GICD_ISPENDR 53 sub x4, x7, x16
|
/trusted-firmware-a/plat/hisilicon/hikey/include/ |
A D | plat_macros.S | 36 mov_imm x16, PLAT_ARM_GICD_BASE 49 add x7, x16, #GICD_ISPENDR 53 sub x4, x7, x16
|
/trusted-firmware-a/plat/hisilicon/hikey960/include/ |
A D | plat_macros.S | 36 mov_imm x16, GICD_REG_BASE 49 add x7, x16, #GICD_ISPENDR 53 sub x4, x7, x16
|
/trusted-firmware-a/plat/renesas/common/include/ |
A D | plat_macros.S | 32 mov_imm x16, RCAR_GICD_BASE 44 add x7, x16, #GICD_ISPENDR 48 sub x4, x7, x16
|
/trusted-firmware-a/plat/mediatek/mt6795/include/ |
A D | plat_macros.S | 29 mov_imm x16, BASE_GICD_BASE 41 add x7, x16, #GICD_ISPENDR 45 sub x4, x7, x16
|
/trusted-firmware-a/plat/mediatek/mt8173/include/ |
A D | plat_macros.S | 35 mov_imm x16, BASE_GICD_BASE 47 add x7, x16, #GICD_ISPENDR 51 sub x4, x7, x16
|
/trusted-firmware-a/plat/xilinx/versal/include/ |
A D | plat_macros.S | 75 add x7, x16, #GICD_ISPENDR 79 sub x4, x7, x16 106 mov_imm x16, PLAT_VERSAL_GICR_BASE
|
/trusted-firmware-a/include/plat/arm/common/aarch64/ |
A D | arm_macros.S | 75 add x7, x16, #GICD_ISPENDR 79 sub x4, x7, x16 88 sub x4, x7, x16
|
/trusted-firmware-a/plat/nxp/common/psci/aarch64/ |
A D | psci_utils.S | 42 stp x16, x17, [sp, #-16]! 187 ldp x16, x17, [sp], #16 224 stp x16, x17, [sp, #-16]! 268 ldp x16, x17, [sp], #16 353 ldp x16, x17, [sp], #16 578 ldp x16, x17, [sp], #16 654 ldp x16, x17, [sp], #16 800 ldp x16, x17, [sp], #16 858 ldp x16, x17, [sp], #16 1005 ldp x16, x17, [sp], #16 [all …]
|
/trusted-firmware-a/plat/common/aarch64/ |
A D | crash_console_helpers.S | 114 stp x16, x17, [x1, #16] 148 ldp x16, x17, [x1, #16] 163 stp x16, x17, [x1, #16] 185 ldp x16, x17, [x1, #16]
|
/trusted-firmware-a/bl31/aarch64/ |
A D | runtime_exceptions.S | 497 mrs x16, spsr_el3 500 stp x16, x17, [x6, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3] 524 ubfx x16, x0, #FUNCID_OEN_SHIFT, #FUNCID_OEN_WIDTH 526 orr x16, x16, x15, lsl #FUNCID_OEN_WIDTH 531 ldrb w15, [x14, x16]
|
/trusted-firmware-a/include/plat/marvell/armada/common/aarch64/ |
A D | marvell_macros.S | 84 add x7, x16, #GICD_ISPENDR 88 sub x4, x7, x16
|
/trusted-firmware-a/plat/allwinner/common/include/ |
A D | plat_macros.S | 23 mov_imm x16, SUNXI_GICD_BASE
|
/trusted-firmware-a/plat/qemu/common/include/ |
A D | plat_macros.S | 22 mov_imm x16, GICD_BASE
|
/trusted-firmware-a/include/plat/arm/css/common/aarch64/ |
A D | css_macros.S | 20 mov_imm x16, PLAT_ARM_GICD_BASE
|
/trusted-firmware-a/plat/xilinx/zynqmp/include/ |
A D | plat_macros.S | 23 mov_imm x16, BASE_GICD_BASE
|
/trusted-firmware-a/plat/marvell/armada/a3k/common/include/ |
A D | plat_macros.S | 21 mov_imm x16, MVEBU_GICD_BASE
|
/trusted-firmware-a/bl32/tsp/aarch64/ |
A D | tsp_exceptions.S | 30 stp x16, x17, [sp, #0x80] 43 ldp x16, x17, [sp, #0x80]
|
/trusted-firmware-a/plat/nxp/soc-lx2160a/aarch64/ |
A D | lx2160a.S | 953 orr x16, x16, #CPUACTLR_DIS_L2_TLB_PRE 976 mov x16, #PMU_IPSTPCR1_OFFSET 977 ldr w10, [x1, x16] 1019 str w8, [x1, x16] 1162 stp x15, x16, [sp, #-16]! 1233 ldp x15, x16, [sp], #16 1252 mov x16, #PMU_IPSTPCR4_OFFSET 1253 str w13, [x1, x16] 1417 mov x16, #PMU_IPSTPCR4_OFFSET 1419 str w9, [x1, x16] [all …]
|
/trusted-firmware-a/bl1/aarch64/ |
A D | bl1_exceptions.S | 270 mrs x16, spsr_el3 273 stp x16, x17, [x6, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
|