| /trusted-firmware-a/lib/cpus/aarch64/ |
| A D | neoverse_n1.S | 51 ret x17
97 ret x17
123 ret x17
150 ret x17
176 ret x17
202 ret x17
228 ret x17
254 ret x17
280 ret x17
306 ret x17
[all …]
|
| A D | neoverse_n2.S | 32 mov x17, x30
55 ret x17
74 mov x17, x30
81 ret x17
108 ret x17
177 ret x17
205 ret x17
234 ret x17
262 ret x17
299 ret x17
[all …]
|
| A D | neoverse_v1.S | 33 mov x17, x30
43 ret x17
61 mov x17, x30
71 ret x17
99 ret x17
127 ret x17
181 ret x17
218 ret x17
253 ret x17
282 ret x17
[all …]
|
| A D | cortex_a57.S | 86 mov x17, x30
93 ret x17
135 ret x17
163 ret x17
207 ret x17
234 ret x17
261 ret x17
295 ret x17
322 ret x17
349 ret x17
[all …]
|
| A D | cortex_a710.S | 35 mov x17, x30
58 ret x17
78 mov x17, x30
101 ret x17
120 mov x17, x30
127 ret x17
154 ret x17
174 mov x17, x30
181 ret x17
202 mov x17, x30
[all …]
|
| A D | cortex_a55.S | 31 mov x17, x30
39 ret x17
61 mov x17, x30
72 ret x17
102 mov x17, x30
110 ret x17
134 mov x17, x30
142 ret x17
162 mov x17, x30
170 ret x17
[all …]
|
| A D | cortex_a78.S | 30 mov x17, x30
38 ret x17
56 mov x17, x30
66 ret x17
87 mov x17, x30
119 ret x17
138 mov x17, x30
148 ret x17
192 ret x17
221 ret x17
[all …]
|
| A D | cortex_a76.S | 212 mov x17, x30
220 ret x17
240 mov x17, x30
248 ret x17
268 mov x17, x30
276 ret x17
304 ret x17
332 ret x17
375 ret x17
415 ret x17
[all …]
|
| A D | cortex_a77.S | 36 mov x17, x30
75 ret x17
98 mov x17, x30
108 ret x17
127 mov x17, x30
160 ret x17
178 mov x17, x30
188 ret x17
|
| A D | dsu_helpers.S | 51 mov x17, x30
61 ret x17
129 mov x17, x30
140 ret x17
|
| A D | cortex_a53.S | 91 mov x17, x30
99 ret x17
145 mov x17, x30
152 ret x17
177 mov x17, x30
185 ret x17
|
| A D | cortex_a78_ae.S | 30 mov x17, x30
40 ret x17
60 mov x17, x30
92 ret x17
|
| /trusted-firmware-a/lib/romlib/templates/ |
| A D | wrapper.S | 8 ldr x17, =jmptbl
10 ldr x17, [x17]
11 add x16, x16, x17
|
| A D | wrapper_bti.S | 9 ldr x17, =jmptbl
11 ldr x17, [x17]
12 add x16, x16, x17
|
| /trusted-firmware-a/plat/amlogic/common/include/ |
| A D | plat_macros.S | 36 mov_imm x17, AML_GICC_BASE
39 ldr w8, [x17, #GICC_HPPIR]
40 ldr w9, [x17, #GICC_AHPPIR]
41 ldr w10, [x17, #GICC_CTLR]
|
| /trusted-firmware-a/plat/hisilicon/hikey/include/ |
| A D | plat_macros.S | 37 mov_imm x17, PLAT_ARM_GICC_BASE
42 ldr w8, [x17, #GICC_HPPIR]
43 ldr w9, [x17, #GICC_AHPPIR]
44 ldr w10, [x17, #GICC_CTLR]
|
| /trusted-firmware-a/plat/hisilicon/hikey960/include/ |
| A D | plat_macros.S | 37 mov_imm x17, GICC_REG_BASE
42 ldr w8, [x17, #GICC_HPPIR]
43 ldr w9, [x17, #GICC_AHPPIR]
44 ldr w10, [x17, #GICC_CTLR]
|
| /trusted-firmware-a/plat/renesas/common/include/ |
| A D | plat_macros.S | 31 mov_imm x17, RCAR_GICC_BASE
37 ldr w8, [x17, #GICC_HPPIR]
38 ldr w9, [x17, #GICC_AHPPIR]
39 ldr w10, [x17, #GICC_CTLR]
|
| /trusted-firmware-a/plat/mediatek/mt6795/include/ |
| A D | plat_macros.S | 30 mov_imm x17, BASE_GICC_BASE
34 ldr w8, [x17, #GICC_HPPIR]
35 ldr w9, [x17, #GICC_AHPPIR]
36 ldr w10, [x17, #GICC_CTLR]
|
| /trusted-firmware-a/plat/mediatek/mt8173/include/ |
| A D | plat_macros.S | 36 mov_imm x17, BASE_GICC_BASE
40 ldr w8, [x17, #GICC_HPPIR]
41 ldr w9, [x17, #GICC_AHPPIR]
42 ldr w10, [x17, #GICC_CTLR]
|
| /trusted-firmware-a/plat/xilinx/versal/include/ |
| A D | plat_macros.S | 67 ldr w8, [x17, #GICC_HPPIR]
68 ldr w9, [x17, #GICC_AHPPIR]
69 ldr w10, [x17, #GICC_CTLR]
105 mov_imm x17, PLAT_VERSAL_GICD_BASE
|
| /trusted-firmware-a/include/plat/arm/common/aarch64/ |
| A D | arm_macros.S | 67 ldr w8, [x17, #GICC_HPPIR]
68 ldr w9, [x17, #GICC_AHPPIR]
69 ldr w10, [x17, #GICC_CTLR]
|
| /trusted-firmware-a/plat/arm/board/fvp/include/ |
| A D | plat_macros.S | 32 mov_imm x17, BASE_GICC_BASE
36 mov_imm x17, VE_GICC_BASE
|
| /trusted-firmware-a/lib/el3_runtime/aarch64/ |
| A D | context.S | 399 mrs x17, cpacr_el1
416 mrs x17, tpidr_el1
431 mrs x17, contextidr_el1
499 msr cpacr_el1, x17
516 msr tpidr_el1, x17
889 mrs x17, spsel
890 cmp x17, #MODE_SP_EL0
900 mov x17, sp
912 msr elr_el3, x17
938 cbz x17, 1f
[all …]
|
| /trusted-firmware-a/plat/nvidia/tegra/common/aarch64/ |
| A D | tegra_helpers.S | 207 mov x17, #BL31_BASE
208 cmp x18, x17
216 mov x0, x17
241 br x17
248 adr x17, tegra_bl31_phys_base
249 ldr x18, [x17]
252 str x18, [x17]
|