/u-boot/arch/arm/dts/ |
A D | exynos4412-odroid.dts | 59 regulator-name = "VDD_ALIVE_1.0V"; 77 regulator-name = "VDDQ_MMC2_2.8V"; 89 regulator-name = "VMPLL_1.0V"; 95 regulator-name = "VPLL_1.1V"; 113 regulator-name = "VDD_ABB1_1.8V"; 119 regulator-name = "VDD_UOTG_3.0V"; 125 regulator-name = "VDD_C2C_1.8V"; 163 regulator-name = "TFLASH_2.8V"; 186 regulator-name = "VDD_MIF_1.0V"; 192 regulator-name = "VDD_ARM_1.0V"; [all …]
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A D | s5pc1xx-goni.dts | 51 regulator-name = "VALIVE_1.1V"; 67 regulator-name = "VADC_3.3V"; 74 regulator-name = "VTF_2.8V"; 81 regulator-name = "VCC_3.3V"; 88 regulator-name = "VLCD_1.8V"; 110 regulator-name = "VPLL_1.1V"; 132 regulator-name = "CAM_A_2.8V"; 153 regulator-name = "VMIPI_1.8V"; 168 regulator-name = "VARM_1.2V"; 175 regulator-name = "VINT_1.2V"; [all …]
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A D | exynos4210-universal_c210.dts | 82 regulator-name = "VALIVE_1.2V"; 96 regulator-name = "VADC_3.3V"; 102 regulator-name = "VTF_2.8V"; 127 regulator-name = "VCC_2.8V"; 134 regulator-name = "VPLL_1.1V"; 148 regulator-name = "PS_2.8V"; 154 regulator-name = "VHIC_1.2V"; 184 regulator-name = "VINT_1.1V"; 192 regulator-name = "VG3D_1.1V"; 199 regulator-name = "VCC_1.8V"; [all …]
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A D | exynos4412-trats2.dts | 197 regulator-name = "VMIPI_1.0V"; 213 regulator-name = "VMIPI_1.8V"; 221 regulator-name = "VABB1_1.95V"; 230 regulator-name = "VUOTG_3.0V"; 246 regulator-name = "VABB2_1.95V"; 255 regulator-name = "VHSIC_1.0V"; 263 regulator-name = "VHSIC_1.8V"; 287 regulator-name = "VT_CAM_1.8V"; 303 regulator-name = "VTF_2.8V"; 328 regulator-name = "TSP_VDD_1.8V"; [all …]
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A D | zynqmp-e-a2197-00-revA.dts | 258 /* 0.78V @ 4A */ 266 /* 0.78V @ 1A */ 274 /* 0.78V @ 2A */ 300 /* 1.5V @ 3A */ 316 /* 3.3V @ 5A */ 324 /* 3.3V @ 5A */ 332 /* 3.3V @ 5A */ 340 /* 1.8V @ 2A */ 348 /* 1.8V @ 6A */ 364 /* 1.2V @ 4A */ [all …]
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A D | exynos4210-trats.dts | 122 regulator-name = "VMIPI_1.8V"; 135 regulator-name = "CAM_ISP_1.8V"; 161 regulator-name = "VT_CAM_1.8V"; 173 regulator-name = "VLCD_2.2V"; 179 regulator-name = "CAM_SENSOR_IO_1.8V"; 185 regulator-name = "VDDQ_M1M2_1.2V"; 211 regulator-name = "CAM_ISP_CORE_1.2V"; 224 regulator-name = "VCC_SUB_2.0V";
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A D | am335x-osd335x-common.dtsi | 77 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 86 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
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A D | omap4-l4.dtsi | 54 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */ 154 /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */ 192 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */ 255 /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */ 332 /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */ 473 /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */ 494 /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */ 588 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */ 627 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */ 665 /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */ [all …]
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A D | omap4-l4-abe.dtsi | 97 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ 130 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ 163 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ 195 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ 231 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ 264 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ 290 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ 324 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ 354 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ 384 /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ [all …]
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/u-boot/arch/arm/mach-socfpga/ |
A D | Kconfig | 114 bool "Aries MCVEVK (Cyclone V)" 122 bool "ABB SECU1 (Arria V)" 127 bool "Altera SOCFPGA SoCDK (Arria V)" 131 bool "Altera SOCFPGA SoCDK (Cyclone V)" 135 bool "Devboards DBM-SoC1 (Cyclone V)" 139 bool "EBV SoCrates (Cyclone V)" 143 bool "IS1 (Cyclone V)" 152 bool "SR1500 (Cyclone V)" 164 bool "Terasic DE10-Nano (Cyclone V)" 168 bool "Terasic DE1-SoC (Cyclone V)" [all …]
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/u-boot/doc/board/emulation/ |
A D | qemu-riscv.rst | 4 QEMU RISC-V 7 QEMU for RISC-V supports a special 'virt' machine designed for emulation and 15 configuration information to guest software. It implements RISC-V privileged 22 - For 32-bit RISC-V:: 27 - For 64-bit RISC-V:: 41 - For 32-bit RISC-V:: 45 - For 64-bit RISC-V:: 86 - For 32-bit RISC-V:: 91 - For 64-bit RISC-V:: 99 - For 32-bit RISC-V:: [all …]
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/u-boot/drivers/power/ |
A D | Kconfig | 113 On A31 boards dcdc2 is used for VDD-GPU and should be 1.2V. 117 On R40 boards dcdc2 is VDD-CPU and should be 1.1V 131 should be 1.25V. 164 should be 1.5V, 1.35V if DDR3L is used. 179 should be 1.8V. 197 LPDDR2, and the codec. It should be 1.8V. 207 On A10(s) / A13 / A20 boards aldo3 should be 2.8V. 209 be 3.0V. 212 3.0V. 229 indicate that this is about 0.0167 V/uS. [all …]
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/u-boot/board/freescale/ls1012afrdm/ |
A D | README | 19 operating at 1.35 V 42 - 5 V input supply from USB 43 - 0.9 V, 1.35 V, and 1.8 V for VDD/Core, DDR, I/O, and
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/u-boot/board/toradex/colibri_t20/ |
A D | colibri_t20.c | 130 gpio_request(TEGRA_GPIO(V, 4), "LAN_RESET"); in pin_mux_usb() 131 gpio_direction_output(TEGRA_GPIO(V, 4), 0); in pin_mux_usb() 134 gpio_set_value(TEGRA_GPIO(V, 4), 1); in pin_mux_usb()
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/u-boot/board/toradex/colibri_t30/ |
A D | colibri_t30.c | 88 gpio_request(TEGRA_GPIO(V, 2), "BL_ON"); in board_preboot_os() 89 gpio_direction_output(TEGRA_GPIO(V, 2), 0); in board_preboot_os()
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/u-boot/doc/board/AndesTech/ |
A D | ax25-ae350.rst | 7 base on RISC-V architecture. 116 RISC-V # version 124 RISC-V # ping 10.0.4.97 ; 128 RISC-V # mmc rescan 129 RISC-V # fatls mmc 0:1 155 RISC-V # sf erase 0x0 0x51000 167 RISC-V # 182 RISC-V # 222 RISC-V # mmc rescan 223 RISC-V # mmc part [all …]
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/u-boot/board/avionic-design/common/ |
A D | tamonten-ng.c | 45 gpio_request(TEGRA_GPIO(V, 2), "ALIVE"); in gpio_early_init() 46 gpio_direction_output(TEGRA_GPIO(V, 2), 1); in gpio_early_init()
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/u-boot/arch/sandbox/dts/ |
A D | sandbox_pmic.dtsi | 15 regulator-name = "SUPPLY_1.2V"; 24 regulator-name = "SUPPLY_3.3V"; 30 regulator-name = "VDD_EMMC_1.8V"; 39 regulator-name = "VDD_LCD_3.3V"; 45 regulator-name = "buck_SUPPLY_1.5V";
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/u-boot/doc/usage/ |
A D | sbi.rst | 17 Interface) implementation on RISC-V systems. 42 The first line indicates the version of the RISC-V SBI specification.
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/u-boot/doc/device-tree-bindings/regulator/ |
A D | max77686.txt | 28 regulator-name = "VDD_ALIVE_1.0V"; 36 regulator-name = "VDDQ_VM1M2_1.2V"; 55 regulator-name = "VDD_MIF_1.0V";
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/u-boot/board/freescale/mx28evk/ |
A D | README | 22 * Wall 5V: Up 23 * VDD 5V: To the left (off) 31 * Wall 5V: Up 32 * VDD 5V: To the left (off)
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/u-boot/arch/powerpc/cpu/mpc83xx/sysio/ |
A D | Kconfig.mpc8308 | 196 bool "40 Ohm, 3.3V" 199 bool "40 Ohm, 2.5V" 207 bool "40 Ohm, 3.3V" 210 bool "40 Ohm, 2.5V" 218 bool "40 Ohm, 3.3V" 221 bool "40 Ohm, 2.5V"
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/u-boot/drivers/cpu/ |
A D | Kconfig | 18 bool "Enable RISC-V CPU driver" 21 Support CPU cores for RISC-V architecture.
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/u-boot/board/toradex/apalis_t30/ |
A D | apalis_t30.c | 177 gpio_request(TEGRA_GPIO(V, 2), "BKL1_ON"); in board_preboot_os() 178 gpio_direction_output(TEGRA_GPIO(V, 2), 0); in board_preboot_os()
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/u-boot/scripts/ |
A D | coccicheck | 27 if [ -n "$V" -a "$V" != "0" ]; then 28 VERBOSE="$V"
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