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/u-boot/arch/x86/include/asm/arch-baytrail/acpi/
A Dirqroute.h9 PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, A, A, A), \
10 PCI_DEV_PIRQ_ROUTE(EMMC_DEV, A, A, A, A), \
11 PCI_DEV_PIRQ_ROUTE(SDIO_DEV, A, A, A, A), \
12 PCI_DEV_PIRQ_ROUTE(SD_DEV, A, A, A, A), \
13 PCI_DEV_PIRQ_ROUTE(SATA_DEV, A, A, A, A), \
14 PCI_DEV_PIRQ_ROUTE(XHCI_DEV, A, A, A, A), \
15 PCI_DEV_PIRQ_ROUTE(LPE_DEV, A, A, A, A), \
16 PCI_DEV_PIRQ_ROUTE(MMC45_DEV, A, A, A, A), \
18 PCI_DEV_PIRQ_ROUTE(TXE_DEV, A, A, A, A), \
19 PCI_DEV_PIRQ_ROUTE(HDA_DEV, A, A, A, A), \
[all …]
/u-boot/fs/squashfs/
A Dsqfs_utils.h15 #define SQFS_FRAGMENT_INDEX_OFFSET(A) ((A) % SQFS_MAX_ENTRIES) argument
16 #define SQFS_FRAGMENT_INDEX(A) ((A) / SQFS_MAX_ENTRIES) argument
17 #define SQFS_BLOCK_SIZE(A) ((A) & GENMASK(23, 0)) argument
20 #define SQFS_COMPRESSED_BLOCK(A) (!((A) & BIT(24))) argument
22 #define SQFS_COMPRESSED_DATA(A) (!((A) & 0x0002)) argument
23 #define SQFS_IS_FRAGMENTED(A) ((A) != 0xFFFFFFFF) argument
28 #define SQFS_COMPRESSED_METADATA(A) (!((A) & BIT(15))) argument
29 #define SQFS_METADATA_SIZE(A) ((A) & GENMASK(14, 0)) argument
/u-boot/lib/
A Dsha1.c101 A = ctx->state[0]; in sha1_process()
110 P (A, B, C, D, E, W[0]); in sha1_process()
111 P (E, A, B, C, D, W[1]); in sha1_process()
112 P (D, E, A, B, C, W[2]); in sha1_process()
113 P (C, D, E, A, B, W[3]); in sha1_process()
114 P (B, C, D, E, A, W[4]); in sha1_process()
115 P (A, B, C, D, E, W[5]); in sha1_process()
116 P (E, A, B, C, D, W[6]); in sha1_process()
117 P (D, E, A, B, C, W[7]); in sha1_process()
118 P (C, D, E, A, B, W[8]); in sha1_process()
[all …]
A Dsha256.c62 uint32_t A, B, C, D, E, F, G, H; in sha256_process() local
105 A = ctx->state[0]; in sha256_process()
114 P(A, B, C, D, E, F, G, H, W[0], 0x428A2F98); in sha256_process()
115 P(H, A, B, C, D, E, F, G, W[1], 0x71374491); in sha256_process()
116 P(G, H, A, B, C, D, E, F, W[2], 0xB5C0FBCF); in sha256_process()
117 P(F, G, H, A, B, C, D, E, W[3], 0xE9B5DBA5); in sha256_process()
118 P(E, F, G, H, A, B, C, D, W[4], 0x3956C25B); in sha256_process()
119 P(D, E, F, G, H, A, B, C, W[5], 0x59F111F1); in sha256_process()
120 P(C, D, E, F, G, H, A, B, W[6], 0x923F82A4); in sha256_process()
121 P(B, C, D, E, F, G, H, A, W[7], 0xAB1C5ED5); in sha256_process()
[all …]
/u-boot/arch/arm/dts/
A Dat91sam9x5_macb0.dtsi20 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
21 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
22 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
23 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
24 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
25 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
26 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
27 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
28 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
34 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
[all …]
A Dsama5d3_gmac.dtsi20 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
21 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
22 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
23 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
24 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
26 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
46 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
47 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
48 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
59 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
[all …]
A Dsama5d3_emac.dtsi20 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
21 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
22 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
23 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
24 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
25 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
26 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
27 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
28 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
29 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
A Dat91sam9g45.dtsi447 /* A B */
651 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
699 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
700 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
706 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
707 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
825 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
826 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
827 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
828 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
[all …]
A Dat91sam9263.dtsi415 /* A B */
607 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
608 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
614 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
679 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
680 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
681 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
683 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
684 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
685 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
[all …]
A Dsam9x60.dtsi140 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
141 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
142 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
143 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
144 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
145 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
146 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
147 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
148 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
149 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
[all …]
A Dsama5d3_mci2.dtsi21 … <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
22 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
23 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
27 …<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC12 periph A MCI2_DA1 with pullup, conflicts …
28 …AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC13 periph A MCI2_DA2 with pullup, conflicts w…
29 …AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC14 periph A MCI2_DA3 with pullup, conflicts…
A Dat91sam9260.dtsi451 /* A B */
463 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
471 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
472 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
487 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
506 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
524 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
529 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
534 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
583 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
[all …]
A Dstm32f4-pinctrl.dtsi159 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
160 <STM32_PINMUX('A', 12, AF10)>; /* OTG_FS_DP */
183 <STM32_PINMUX('A', 5, AF10)>, /* OTG_HS_ULPI_CK */
206 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
287 <STM32_PINMUX('A', 4, AF14)>,
295 <STM32_PINMUX('A', 11, AF14)>,
297 <STM32_PINMUX('A', 12, AF14)>,
303 <STM32_PINMUX('A', 6, AF14)>,
321 <STM32_PINMUX('A', 3, AF14)>,
354 <STM32_PINMUX('A', 8, AF4)>;
[all …]
/u-boot/arch/x86/lib/
A Dbios.h35 #define DOWNTO8(A) \ argument
40 uint8_t A##l; \
41 uint8_t A##h; \
43 uint16_t A##x; \
45 uint16_t h##A##x; \
47 uint32_t e##A##x; \
50 #define DOWNTO16(A) \ argument
53 uint16_t A; \
54 uint16_t h##A; \
56 uint32_t e##A; \
/u-boot/include/
A Dsignatures.h22 #define SIGNATURE_16(A, B) ((A) | (B << 8)) argument
38 #define SIGNATURE_32(A, B, C, D) \ argument
39 (SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16))
59 #define SIGNATURE_64(A, B, C, D, E, F, G, H) \ argument
60 (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32))
/u-boot/scripts/kconfig/tests/auto_submenu/
A DKconfig1 config A config
2 bool "A"
7 depends on A
10 This depends on A, so should be a submenu of A.
21 depends on A
43 This is independent of A.
47 depends on A
49 This depends on A, but not a consecutive item, so can/should not
/u-boot/scripts/kconfig/tests/new_choice_with_dep/
A DKconfig1 config A config
2 bool "A"
8 depends on A
10 "depends on A" has been newly added.
33 depends on A
/u-boot/doc/android/
A Dab.rst3 Android A/B updates
9 A/B system updates ensures modern approach for system update. This feature
11 (normally slot A and slot B). The system runs from the current slot while the
14 A/B enablement
17 The A/B updates support can be activated by specifying next options in
29 As a result you can use ``ab_select`` command to ensure A/B boot process in your
30 boot script. This command analyzes and processes A/B metadata stored on a
64 A/B metadata is organized according to AOSP reference [2]_. On the first system
65 start with A/B enabled, when ``misc`` partition doesn't contain required data,
66 the default A/B metadata will be created and written to ``misc`` partition.
/u-boot/scripts/kconfig/tests/no_write_if_dep_unmet/
A DKconfig1 config A config
2 bool "A"
6 depends on A
/u-boot/lib/libavb/
A Davb_rsa.c89 int64_t A = 0; in subM() local
92 A += (uint64_t)a[i] - key->n[i]; in subM()
93 a[i] = (uint32_t)A; in subM()
94 A >>= 32; in subM()
118 uint64_t A = (uint64_t)a * b[0] + c[0]; in montMulAdd() local
119 uint32_t d0 = (uint32_t)A * key->n0inv; in montMulAdd()
120 uint64_t B = (uint64_t)d0 * key->n[0] + (uint32_t)A; in montMulAdd()
124 A = (A >> 32) + (uint64_t)a * b[i] + c[i]; in montMulAdd()
129 A = (A >> 32) + (B >> 32); in montMulAdd()
131 c[i - 1] = (uint32_t)A; in montMulAdd()
[all …]
/u-boot/board/google/chromebook_coral/
A Dbaseboard_dptf.asl29 Package () { 0, 0, 0, 0, 255, 0xBB8, "mA", 0 }, /* 3A (MAX) */
30 Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */
31 Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */
32 Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */
33 Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0.0A */
/u-boot/arch/arm/lib/
A Duldivmod.S57 @ D_0 = clz A
67 @ if clz B - clz A > 0
70 @ B <<= (clz B - clz A)
79 @ C = 1 << (clz B - clz A)
126 @ if A >= B
130 @ A -= B
137 @ if A == 0: break
171 @ R = A & (B - 1)
174 @ Q = A >> log2(B)
196 @ R = A & (B - 1)
[all …]
/u-boot/doc/board/amlogic/
A Dindex.rst59 | CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** …
61 | HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** …
63 | CEC | No | No | No | *N/A* | No …
67 | LCD/LVDS Output | No | *N/A* | No | No | No …
69 | MIPI DSI Output | *N/A* | *N/A* | *N/A* | No | No …
/u-boot/tools/scripts/
A Ddefine2mk.sed10 /^#define CONFIG_[A-Za-z0-9_][A-Za-z0-9_]*/ {
30 s/="\(CONFIG_[A-Za-z0-9_][A-Za-z0-9_]*\)"/=$(\1)/;
/u-boot/doc/board/toradex/
A Dverdin-imx8mm.rst15 Get and Build the ARM Trusted Firmware (Trusted Firmware A)
20 $ echo "Downloading and building TF-A..."
21 $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
24 Then build ATF (TF-A):
75 * SPL ---> ATF (TF-A) ---> U-Boot proper
95 Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.0A, Serial:

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