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Searched refs:AHB_CLK_FROM_DDR (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A Dclk.c174 #define AHB_CLK_FROM_DDR CPU_DDR_CLOCK_CONTROL_AHBCLK_FROM_DDRPLL_SET(0) macro
272 writel(CPU_DDR_CLOCK_CONTROL_AHB_DIV_VAL | AHB_CLK_FROM_DDR | in qca956x_pll_init()

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