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Searched refs:AHB_GATE_OFFSET_NAND0 (Results 1 – 7 of 7) sorted by relevance

/u-boot/arch/arm/include/asm/arch-sunxi/
A Dclock_sun9i.h196 #define AHB_GATE_OFFSET_NAND0 13 macro
A Dclock_sun8i_a83t.h203 #define AHB_GATE_OFFSET_NAND0 13 macro
A Dclock_sun4i.h179 #define AHB_GATE_OFFSET_NAND0 13 macro
A Dclock_sun6i.h315 #define AHB_GATE_OFFSET_NAND0 13 macro
/u-boot/board/sunxi/
A Dboard.c394 setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); in nand_clock_setup()
397 setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0)); in nand_clock_setup()
/u-boot/drivers/mtd/nand/raw/
A Dsunxi_nand_spl.c543 clrbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); in nand_deselect()
A Dsunxi_nand.c314 setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_NAND0)); in sunxi_nfc_set_clk_rate()

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