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Searched refs:AHB_RESET_OFFSET_MCTL (Results 1 – 9 of 9) sorted by relevance

/u-boot/arch/arm/include/asm/arch-sunxi/
A Dclock_sun9i.h209 #define AHB_RESET_OFFSET_MCTL 14 macro
A Dclock_sun8i_a83t.h272 #define AHB_RESET_OFFSET_MCTL 14 macro
A Dclock_sun6i.h462 #define AHB_RESET_OFFSET_MCTL 14 macro
/u-boot/arch/arm/mach-sunxi/
A Ddram_sun8i_a83t.c400 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
412 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
A Ddram_sun9i.c275 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
282 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
A Ddram_sun8i_a23.c70 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
A Ddram_sun8i_a33.c316 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
A Ddram_sunxi_dw.c427 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
455 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
A Ddram_sun6i.c47 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()

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