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Searched refs:AIPS1_BASE_ADDR (Results 1 – 9 of 9) sorted by relevance

/u-boot/arch/arm/include/asm/arch-s32v234/
A Dimx-regs.h15 #define AIPS1_BASE_ADDR (0x40080000UL) macro
66 #define ERM_BASE_ADDR (AIPS1_BASE_ADDR + 0X000000000)
67 #define MSCM_BASE_ADDR (AIPS1_BASE_ADDR + 0X000001000)
70 #define SWT2_BASE_ADDR (AIPS1_BASE_ADDR + 0X000004000)
71 #define SWT3_BASE_ADDR (AIPS1_BASE_ADDR + 0X000005000)
72 #define SWT4_BASE_ADDR (AIPS1_BASE_ADDR + 0X000006000)
74 #define EIM_BASE_ADDR (AIPS1_BASE_ADDR + 0X000008000)
75 #define APB_BASE_ADDR (AIPS1_BASE_ADDR + 0X000009000)
93 #define IPL_BASE_ADDR (AIPS1_BASE_ADDR + 0X000043000)
95 #define PMC_BASE_ADDR (AIPS1_BASE_ADDR + 0X000048000)
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/u-boot/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h16 #define AIPS1_BASE_ADDR 0x73F00000 macro
26 #define AIPS1_BASE_ADDR 0x53F00000 macro
59 #define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000)
64 #define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000)
67 #define GPT1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000)
68 #define SRTC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000)
74 #define UART1_BASE (AIPS1_BASE_ADDR + 0x000BC000)
75 #define UART2_BASE (AIPS1_BASE_ADDR + 0x000C0000)
76 #define SRC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D0000)
77 #define CCM_BASE_ADDR (AIPS1_BASE_ADDR + 0x000D4000)
[all …]
/u-boot/arch/arm/include/asm/arch-vf610/
A Dimx-regs.h15 #define AIPS1_BASE_ADDR 0x40080000 macro
94 #define OCOTP_BASE_ADDR (AIPS1_BASE_ADDR + 0x00025000)
95 #define DDR_BASE_ADDR (AIPS1_BASE_ADDR + 0x0002E000)
96 #define ESDHC0_BASE_ADDR (AIPS1_BASE_ADDR + 0x00031000)
97 #define ESDHC1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00032000)
98 #define USBC1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00034000)
99 #define ENET_BASE_ADDR (AIPS1_BASE_ADDR + 0x00050000)
100 #define ENET1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00051000)
101 #define DCU1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00058000)
102 #define NFC_BASE_ADDR (AIPS1_BASE_ADDR + 0x00060000)
/u-boot/arch/arm/include/asm/arch-mx35/
A Dimx-regs.h24 #define AIPS1_BASE_ADDR 0x43F00000 macro
25 #define AIPS1_CTRL_BASE_ADDR AIPS1_BASE_ADDR
A Dlowlevel_macro.S23 ldr r0, =AIPS1_BASE_ADDR
/u-boot/arch/arm/mach-imx/
A Dinit.c17 aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR; in init_aips()
/u-boot/arch/arm/mach-imx/mx5/
A Dlowlevel_init.S62 ldr r0, =AIPS1_BASE_ADDR
/u-boot/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h134 #define AIPS1_BASE_ADDR AIPS1_ON_BASE_ADDR macro
/u-boot/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h201 #define AIPS1_BASE_ADDR AIPS1_ON_BASE_ADDR macro

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