Searched refs:AR71XX_DDR_CTRL_SIZE (Results 1 – 5 of 5) sorted by relevance
| /u-boot/arch/mips/mach-ath79/ar933x/ |
| A D | ddr.c | 109 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_init()
242 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_tap_tuning()
|
| /u-boot/arch/mips/mach-ath79/ar934x/ |
| A D | ddr.c | 47 ddr_regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ar934x_ddr_init()
|
| /u-boot/arch/mips/mach-ath79/qca953x/ |
| A D | ddr.c | 226 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_init()
416 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_tap_tuning()
|
| /u-boot/arch/mips/mach-ath79/qca956x/ |
| A D | ddr.c | 192 void __iomem *ddr_regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in qca956x_ddr_init()
|
| /u-boot/arch/mips/mach-ath79/include/mach/ |
| A D | ar71xx_regs.h | 36 #define AR71XX_DDR_CTRL_SIZE 0x100 macro
|
Completed in 14 milliseconds