Home
last modified time | relevance | path

Searched refs:AR71XX_DDR_REG_REFRESH (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar933x/
A Dddr.c175 AR71XX_DDR_REG_REFRESH); in ddr_init()
178 AR71XX_DDR_REG_REFRESH); in ddr_init()
219 AR71XX_DDR_REG_REFRESH); in ddr_init()
222 AR71XX_DDR_REG_REFRESH); in ddr_init()
/u-boot/arch/mips/mach-ath79/ar934x/
A Dddr.c135 writel(0x412c /* FIXME */, ddr_regs + AR71XX_DDR_REG_REFRESH); in ar934x_ddr_init()
/u-boot/arch/mips/mach-ath79/qca953x/
A Dddr.c294 writel(DDR_REFRESH_VAL, regs + AR71XX_DDR_REG_REFRESH); in ddr_init()
400 writel(DDR_REFRESH_VAL, regs + AR71XX_DDR_REG_REFRESH); in ddr_init()
/u-boot/arch/mips/mach-ath79/qca956x/
A Dddr.c298 writel(CFG_DDR2_REFRESH_VAL, ddr_regs + AR71XX_DDR_REG_REFRESH); in qca956x_ddr_init()
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h219 #define AR71XX_DDR_REG_REFRESH 0x14 macro

Completed in 13 milliseconds