Home
last modified time | relevance | path

Searched refs:AR71XX_PLL_SIZE (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/mips/mach-ath79/
A Dreset.c118 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in eth_init_ar933x()
153 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in eth_init_ar934x()
204 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in qca956x_sgmii_cal()
400 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in eth_init_qca956x()
481 void __iomem *pregs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in usb_reset_qca953x()
/u-boot/arch/mips/mach-ath79/ar933x/
A Dclk.c38 regs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in get_clocks()
/u-boot/arch/mips/mach-ath79/qca953x/
A Dclk.c38 regs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in get_clocks()
/u-boot/arch/mips/mach-ath79/qca956x/
A Dclk.c189 AR71XX_PLL_SIZE, MAP_NOCACHE); in set_val()
225 AR71XX_PLL_SIZE, MAP_NOCACHE); in qca956x_pll_init()
327 regs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in get_clocks()
/u-boot/arch/mips/mach-ath79/ar934x/
A Dclk.c114 AR71XX_PLL_SIZE, MAP_NOCACHE); in ar934x_pll_init()
271 regs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, in ar934x_update_clock()
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h48 #define AR71XX_PLL_SIZE 0x100 macro

Completed in 12 milliseconds