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Searched refs:AR933X_PLL_CPU_CONFIG_REG (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar933x/
A Dlowlevel_init.S186 sw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
189 lw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
210 sw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
215 lw t1, AR933X_PLL_CPU_CONFIG_REG(t0)
A Dclk.c41 val = readl(regs + AR933X_PLL_CPU_CONFIG_REG); in get_clocks()
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h349 #define AR933X_PLL_CPU_CONFIG_REG 0x00 macro

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