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Searched refs:AR933X_SRIF_DDR_DPLL2_REG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar933x/
A Dlowlevel_init.S145 sw t1, AR933X_SRIF_DDR_DPLL2_REG(t0)
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h1160 #define AR933X_SRIF_DDR_DPLL2_REG 0x244 macro

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