AR933X_SRIF_DDR_DPLL3_REG (reference) in projects: u-boot

Searched refs:AR933X_SRIF_DDR_DPLL3_REG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar933x/
A D	lowlevel_init.S	`148 lw t1, AR933X_SRIF_DDR_DPLL3_REG(t0) 153 sw t1, AR933X_SRIF_DDR_DPLL3_REG(t0) 234 lw t1, AR933X_SRIF_DDR_DPLL3_REG(t0) 237 sw t1, AR933X_SRIF_DDR_DPLL3_REG(t0) 249 sw t1, AR933X_SRIF_DDR_DPLL3_REG(t0) 259 lw t1, AR933X_SRIF_DDR_DPLL3_REG(t0)`
/u-boot/arch/mips/mach-ath79/include/mach/
A D	ar71xx_regs.h	`1161 #define AR933X_SRIF_DDR_DPLL3_REG 0x248 macro`

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