AR934X_PLL_CPU_DDR_CLK_CTRL_REG (reference) in projects: u-boot

Searched refs:AR934X_PLL_CPU_DDR_CLK_CTRL_REG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar934x/
A D	clk.c	173 setbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init() 175 setbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init() 177 setbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init() 196 pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG); in ar934x_pll_init() 203 clrbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init() 205 clrbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init() 207 clrbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init() 276 ctrl = readl(regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG); in ar934x_update_clock()
/u-boot/arch/mips/mach-ath79/include/mach/
A D	ar71xx_regs.h	`371 #define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08 macro`

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