Home
last modified time | relevance | path

Searched refs:AR934X_PLL_DDR_CONFIG_RANGE_SHIFT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/ar934x/
A Dclk.c163 (pll_cfg->range << AR934X_PLL_DDR_CONFIG_RANGE_SHIFT) | in ar934x_pll_init()
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h396 #define AR934X_PLL_DDR_CONFIG_RANGE_SHIFT 21 macro

Completed in 9 milliseconds