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Searched refs:BF_ANADIG_PLL_ENET_DIV_SELECT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx6/
A Dcrm_regs.h1234 #define BF_ANADIG_PLL_ENET_DIV_SELECT(v) \ macro
/u-boot/arch/arm/mach-imx/mx6/
A Dclock.c922 reg |= BF_ANADIG_PLL_ENET_DIV_SELECT(freq); in enable_fec_anatop_clock()

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