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Searched refs:BM_ANADIG_PLL_ENET2_DIV_SELECT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx6/
A Dcrm_regs.h1239 #define BM_ANADIG_PLL_ENET2_DIV_SELECT 0x0000000C macro
1241 (((v) << 2) & BM_ANADIG_PLL_ENET2_DIV_SELECT)
/u-boot/arch/arm/mach-imx/mx6/
A Dclock.c927 reg &= ~BM_ANADIG_PLL_ENET2_DIV_SELECT; in enable_fec_anatop_clock()

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