Searched refs:BUS_HCLK_HZ (Results 1 – 8 of 8) sorted by relevance
17 #define BUS_HCLK_HZ 148500000 macro
23 #define BUS_HCLK_HZ 148500000 macro
18 #define BUS_HCLK_HZ 148500000 macro
130 hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1; in rkclk_init()131 assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3); in rkclk_init()
132 hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1; in rkclk_init()133 assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3); in rkclk_init()
191 hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1; in rkclk_init()192 assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3); in rkclk_init()
999 rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ); in rk3308_clk_init()
17 #define BUS_HCLK_HZ 100000000 macro
Completed in 13 milliseconds