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Searched refs:CASLAT_20 (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/memory/
A Dmpc83xx-sdram.h63 #define CASLAT_20 0x3 /* CAS latency = 2.0 */ macro
/u-boot/doc/device-tree-bindings/ram/
A Dfsl,mpc83xx-mem-controller.txt81 * CASLAT_20
/u-boot/drivers/ram/
A Dmpc83xx_sdram.c626 case CASLAT_20: in mpc83xx_sdram_probe()

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