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Searched refs:CASLAT_45 (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/memory/
A Dmpc83xx-sdram.h68 #define CASLAT_45 0x8 /* CAS latency = 4.5 */ macro
/u-boot/doc/device-tree-bindings/ram/
A Dfsl,mpc83xx-mem-controller.txt86 * CASLAT_45
/u-boot/drivers/ram/
A Dmpc83xx_sdram.c637 case CASLAT_45: in mpc83xx_sdram_probe()

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