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Searched refs:CA_ADR_DRVR_DS_OFFSET (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-exynos/
A Ddmc_init_ddr3.c54 (mem->impedance << CA_ADR_DRVR_DS_OFFSET); in ddr3_mem_ctrl_init()
522 (0x7 << CA_CS_DRVR_DS_OFFSET) | (0x7 << CA_ADR_DRVR_DS_OFFSET); in ddr3_mem_ctrl_init()
A Dexynos5_setup.h430 #define CA_ADR_DRVR_DS_OFFSET 0 macro

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