| /u-boot/board/phytec/pcm058/ |
| A D | pcm058.c | 43 clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
55 setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
196 writel(0x0FFFC000, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/engicam/imx6q/ |
| A D | imx6q.c | 56 clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
68 setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
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| /u-boot/arch/arm/mach-imx/mx6/ |
| A D | clock.c | 33 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
38 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
64 clrbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_io_clk()
72 setbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_io_clk()
168 reg = __raw_readl(&imx_ccm->CCGR2); in enable_i2c_clk()
173 __raw_writel(reg, &imx_ccm->CCGR2); in enable_i2c_clk()
832 reg = readl(&imx_ccm->CCGR2); in enable_lcdif_clock()
834 writel(reg, &imx_ccm->CCGR2); in enable_lcdif_clock()
847 reg = readl(&imx_ccm->CCGR2); in enable_lcdif_clock()
849 writel(reg, &imx_ccm->CCGR2); in enable_lcdif_clock()
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| A D | litesom.c | 156 writel(0xFFFFFFFF, &ccm->CCGR2); in ccgr_init()
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| A D | opos6ul.c | 166 writel(0xFFFFFFFF, &ccm->CCGR2); in ccgr_init()
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| A D | soc.c | 672 reg = readl(&mxc_ccm->CCGR2); in imx_setup_hdmi()
675 writel(reg, &mxc_ccm->CCGR2); in imx_setup_hdmi()
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| /u-boot/board/ccv/xpress/ |
| A D | spl.c | 86 writel(0xFFFFFFFF, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/barco/platinum/ |
| A D | platinum.h | 70 writel(0x0FFFC000, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/bticino/mamoj/ |
| A D | spl.c | 148 writel(0x000fc000, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/engicam/common/ |
| A D | spl.c | 377 writel(0x000FC000, &ccm->CCGR2); in ccgr_init()
385 writel(0x0cffffcc, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/phytec/pfla02/ |
| A D | pfla02.c | 287 clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
299 setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
552 writel(0x0FFFC000, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/technexion/pico-imx6ul/ |
| A D | spl.c | 103 writel(0xFFFFFFFF, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/myir/mys_6ulx/ |
| A D | spl.c | 91 writel(0xFFFFFFFF, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/phytec/pcl063/ |
| A D | spl.c | 92 writel(0xFFFFFFFF, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/k+p/kp_imx6q_tpc/ |
| A D | kp_imx6q_tpc_spl.c | 30 writel(0x0FFFC000, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/variscite/dart_6ul/ |
| A D | spl.c | 97 writel(0xFFFFFFFF, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/logicpd/imx6/ |
| A D | imx6logic.c | 211 writel(0x0FFFC000, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/udoo/ |
| A D | udoo_spl.c | 208 writel(0x0FFFC000, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/technexion/pico-imx6/ |
| A D | spl.c | 231 writel(0x0FFFC000, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/liebherr/display5/ |
| A D | spl.c | 194 writel(0x0FFFCFC0, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/bachmann/ot1200/ |
| A D | ot1200.c | 168 writel(0x0FFFC000, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/freescale/mx6ul_14x14_evk/ |
| A D | mx6ul_14x14_evk.c | 484 writel(0xFFFFFFFF, &ccm->CCGR2); in ccgr_init()
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| /u-boot/board/freescale/mx6slevk/ |
| A D | mx6slevk.c | 333 writel(0xFFFFFFFF, &ccm->CCGR2); in ccgr_init()
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| /u-boot/arch/arm/mach-imx/mx5/ |
| A D | clock.c | 93 clrsetbits_le32(&mxc_ccm->CCGR2, in enable_usboh3_clk()
130 clrsetbits_le32(&mxc_ccm->CCGR2, in enable_usb_phy1_clk()
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| /u-boot/board/gateworks/gw_ventana/ |
| A D | gw_ventana_spl.c | 663 writel(0x0FFFC000, &ccm->CCGR2); in ccgr_init()
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