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Searched refs:CCI_MN_BASE (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dconfig.h73 #define CCI_MN_BASE 0x04000000 macro
78 #define CCI_HN_F_0_BASE (CCI_MN_BASE + 0x200000)
79 #define CCI_HN_F_1_BASE (CCI_MN_BASE + 0x210000)
85 #define CCI_RN_I_0_BASE (CCI_MN_BASE + 0x800000)
86 #define CCI_RN_I_2_BASE (CCI_MN_BASE + 0x820000)
87 #define CCI_RN_I_6_BASE (CCI_MN_BASE + 0x860000)
88 #define CCI_RN_I_12_BASE (CCI_MN_BASE + 0x8C0000)
89 #define CCI_RN_I_16_BASE (CCI_MN_BASE + 0x900000)
90 #define CCI_RN_I_20_BASE (CCI_MN_BASE + 0x940000)
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dlowlevel.S119 ldr x0, =CCI_MN_BASE

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