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Searched refs:CCM_PLL5_CTRL_K_X (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-sunxi/
A Ddram_sun4i.c260 reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(3)); in mctl_setup_dram_clock()
265 reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(4)); in mctl_setup_dram_clock()
270 reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(2)); in mctl_setup_dram_clock()
275 reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(3)); in mctl_setup_dram_clock()
280 reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(3)); in mctl_setup_dram_clock()
285 reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(2)); in mctl_setup_dram_clock()
/u-boot/arch/arm/include/asm/arch-sunxi/
A Dclock_sun4i.h225 #define CCM_PLL5_CTRL_K_X(n) ((n) - 1) macro

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