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Searched refs:CCR (Results 1 – 13 of 13) sorted by relevance

/u-boot/arch/sh/cpu/sh4/
A Dcache.c44 ccr = inl(CCR); in cache_control()
50 outl(CCR_CACHE_STOP, CCR); in cache_control()
52 outl(CCR_CACHE_INIT, CCR); in cache_control()
/u-boot/arch/sh/include/asm/
A Dcpu_sh7763.h11 #define CCR 0xFF00001C macro
A Dcpu_sh7734.h11 #define CCR 0xFF00001C macro
A Dcpu_sh7750.h28 #define CCR 0xFF00001C macro
A Dcpu_sh7723.h29 #define CCR 0xFF00001C macro
A Dcpu_sh7757.h9 #define CCR 0xFF00001C macro
A Dcpu_sh7752.h9 #define CCR 0xFF00001C macro
A Dcpu_sh7753.h9 #define CCR 0xFF00001C macro
A Dcpu_sh7780.h28 #define CCR 0xFF00001C macro
A Dcpu_sh7722.h29 #define CCR 0xFF00001C macro
/u-boot/doc/
A DREADME.ne20003 that the CCR is correctly initialized.
/u-boot/board/renesas/r2dplus/
A Dlowlevel_init.S73 CCR_A: .long CCR /* Cache Control Register */
/u-boot/arch/arm/include/asm/arch-pxa/
A Dpxa-regs.h2530 #define CCR 0x44000090 /* Cursor Control Register */ macro

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