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Searched refs:CCTL_L1D_WBINVAL_ALL (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/riscv/cpu/ax25/
A Dcache.c21 #define CCTL_L1D_WBINVAL_ALL 6 macro
52 csr_write(CCTL_REG_MCCTLCOMMAND_NUM, CCTL_L1D_WBINVAL_ALL); in flush_dcache_all()
122 csr_write(CCTL_REG_MCCTLCOMMAND_NUM, CCTL_L1D_WBINVAL_ALL); in dcache_disable()

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