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Searched refs:CDCE9XX_REG_PDIV1L (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/
A Dclk-cdce9xx.c24 #define CDCE9XX_REG_PDIV1L 0x03 macro
146 ret = cdce9xx_reg_read(clk->dev, CDCE9XX_REG_PDIV1L, &val); in cdce9xx_clk_get_pdiv()
212 ret = cdce9xx_reg_write(clk->dev, CDCE9XX_REG_PDIV1L, in cdce9xx_clk_set_rate()

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