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Searched refs:CLASS_PE_SYS_CLK_RATIO (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/net/pfe_eth/pfe/cbus/
A Dclass_csr.h52 #define CLASS_PE_SYS_CLK_RATIO (CLASS_CSR_BASE_ADDR + 0x200) macro
/u-boot/drivers/net/pfe_eth/
A Dpfe_hw.c785 writel(0x0, CLASS_PE_SYS_CLK_RATIO); in class_set_config()
788 writel(0x1, CLASS_PE_SYS_CLK_RATIO); in class_set_config()
A Dpfe_driver.c568 writel(0x3, CLASS_PE_SYS_CLK_RATIO); in pfe_hw_init()

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