CLK2MHZ (reference) in projects: u-boot

Searched refs:CLK2MHZ (Results 1 – 7 of 7) sorted by relevance

/u-boot/arch/arm/mach-rmobile/
A D	timer.c	`19 #define CLK2MHZ(clk) (clk / 1000 / 1000) macro 43 timer = ((timer << 2) + (CLK2MHZ(CONFIG_SYS_CPU_CLK) >> 1)); in get_time_us() 44 do_div(timer, CLK2MHZ(CONFIG_SYS_CPU_CLK)); in get_time_us() 68 wait = (u64)((usec * CLK2MHZ(CONFIG_SYS_CPU_CLK)) >> 2); in __udelay()`
/u-boot/board/renesas/eagle/
A D	eagle.c	`41 #define CLK2MHZ(clk) (clk / 1000 / 1000) macro 53 stc = ((800 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_OFFSET; in s_init()`
/u-boot/board/renesas/stout/
A D	stout.c	`40 #define CLK2MHZ(clk) (clk / 1000 / 1000) macro 53 u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) in s_init()`
/u-boot/board/renesas/gose/
A D	gose.c	`36 #define CLK2MHZ(clk) (clk / 1000 / 1000) macro 48 stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; in s_init()`
/u-boot/board/renesas/koelsch/
A D	koelsch.c	`38 #define CLK2MHZ(clk) (clk / 1000 / 1000) macro 50 stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; in s_init()`
/u-boot/board/renesas/porter/
A D	porter.c	`38 #define CLK2MHZ(clk) (clk / 1000 / 1000) macro 50 stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT; in s_init()`
/u-boot/board/renesas/lager/
A D	lager.c	`40 #define CLK2MHZ(clk) (clk / 1000 / 1000) macro 53 u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) in s_init()`

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