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Searched refs:CLKMGR_A10_MAINPLL_VCO0 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-socfpga/
A Dclock_manager_arria10.c664 socfpga_get_clkmgr_addr() + CLKMGR_A10_MAINPLL_VCO0); in cm_full_cfg()
733 clrbits_le32(socfpga_get_clkmgr_addr() + CLKMGR_A10_MAINPLL_VCO0, in cm_full_cfg()
744 writel((readl(socfpga_get_clkmgr_addr() + CLKMGR_A10_MAINPLL_VCO0) & in cm_full_cfg()
747 socfpga_get_clkmgr_addr() + CLKMGR_A10_MAINPLL_VCO0); in cm_full_cfg()
864 setbits_le32(socfpga_get_clkmgr_addr() + CLKMGR_A10_MAINPLL_VCO0, in cm_full_cfg()
870 clrbits_le32(socfpga_get_clkmgr_addr() + CLKMGR_A10_MAINPLL_VCO0, in cm_full_cfg()
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dclock_manager_arria10.h18 #define CLKMGR_A10_MAINPLL_VCO0 0x40 macro

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