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Searched refs:CLKMGR_BYPASS_SDRPLL (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-socfpga/include/mach/
A Dclock_manager_gen5.h129 #define CLKMGR_BYPASS_SDRPLL BIT(1) macro
/u-boot/arch/arm/mach-socfpga/
A Dclock_manager_gen5.c98 cm_write_bypass(CLKMGR_BYPASS_PERPLL | CLKMGR_BYPASS_SDRPLL | in cm_basic_init()

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