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Searched refs:CLKMGR_CLKCNT_MSK (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-socfpga/
A Dclock_manager_s10.c280 CLKMGR_CLKCNT_MSK); in cm_get_mpu_clk_hz()
297 CLKMGR_S10_MAINPLL_MPUCLK) & CLKMGR_CLKCNT_MSK); in cm_get_mpu_clk_hz()
319 CLKMGR_S10_PERPLL_PLLC1) & CLKMGR_CLKCNT_MSK); in cm_get_l3_main_clk_hz()
336 CLKMGR_S10_MAINPLL_NOCCLK) & CLKMGR_CLKCNT_MSK); in cm_get_l3_main_clk_hz()
352 CLKMGR_CLKCNT_MSK); in cm_get_mmc_controller_clk_hz()
359 CLKMGR_CLKCNT_MSK); in cm_get_mmc_controller_clk_hz()
383 CLKMGR_NOCDIV_L4SPCLK_OFFSET) & CLKMGR_CLKCNT_MSK)); in cm_get_l4_sp_clk_hz()
399 CLKMGR_NOCDIV_L4MAIN_OFFSET) & CLKMGR_CLKCNT_MSK)); in cm_get_spi_controller_clk_hz()
/u-boot/drivers/clk/altera/
A Dclk-agilex.c408 CLKMGR_CLKCNT_MSK); in clk_get_clksrc_hz()
414 CLKMGR_CLKCNT_MSK); in clk_get_clksrc_hz()
442 CLKMGR_CLKCNT_MSK); in clk_get_mpu_clk_hz()
472 CLKMGR_CLKCNT_MSK); in clk_get_sdmmc_clk_hz()
551 CLKMGR_CLKCNT_MSK); in clk_get_emac_clk_hz()
554 CLKMGR_CLKCNT_MSK); in clk_get_emac_clk_hz()
562 CLKMGR_CLKCNT_MSK); in clk_get_emac_clk_hz()
565 CLKMGR_CLKCNT_MSK); in clk_get_emac_clk_hz()
A Dclk-agilex.h160 #define CLKMGR_CLKCNT_MSK GENMASK(10, 0) macro
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dclock_manager_s10.h141 #define CLKMGR_CLKCNT_MSK 0x7ff macro

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