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Searched refs:CLKMGR_GEN5_INTER (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-socfpga/include/mach/
A Dclock_manager_gen5.h53 #define CLKMGR_GEN5_INTER 0x08 macro
95 #define CLKMGR_INTER CLKMGR_GEN5_INTER
/u-boot/arch/arm/mach-socfpga/
A Dclock_manager_gen5.c340 socfpga_get_clkmgr_addr() + CLKMGR_GEN5_INTER); in cm_basic_init()

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