Home
last modified time | relevance | path

Searched refs:CLKMGR_GEN5_MAINPLL_MAINNANDSDMMCCLK (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-socfpga/
A Dclock_manager_gen5.c185 CLKMGR_GEN5_MAINPLL_MAINNANDSDMMCCLK); in cm_basic_init()
483 CLKMGR_GEN5_MAINPLL_MAINNANDSDMMCCLK); in cm_get_mmc_controller_clk_hz()
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dclock_manager_gen5.h62 #define CLKMGR_GEN5_MAINPLL_MAINNANDSDMMCCLK 0x58 macro

Completed in 4 milliseconds