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Searched refs:CLKMGR_GEN5_SDRPLL_EN (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-socfpga/
A Dclock_manager_gen5.c92 writel(0, socfpga_get_clkmgr_addr() + CLKMGR_GEN5_SDRPLL_EN); in cm_basic_init()
334 writel(~0, socfpga_get_clkmgr_addr() + CLKMGR_GEN5_SDRPLL_EN); in cm_basic_init()
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dclock_manager_gen5.h89 #define CLKMGR_GEN5_SDRPLL_EN 0xd8 macro

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