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Searched refs:CLKMGR_MAINPLLGRP_DBGDIV_DBGCLK_OFFSET (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-socfpga/
A Dwrap_pll_config.c61 CLKMGR_MAINPLLGRP_DBGDIV_DBGCLK_OFFSET),
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dclock_manager_gen5.h194 #define CLKMGR_MAINPLLGRP_DBGDIV_DBGCLK_OFFSET 2 macro

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