Searched refs:CLKMGR_MAINPLL_PLLC2 (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/altera/
A D	clk-agilex.h	93 #define CLKMGR_MAINPLL_PLLC2 0x64 macro
A D	clk-agilex.c	274 CM_REG_WRITEL(plat, cfg->main_pll_pllc2, CLKMGR_MAINPLL_PLLC2); in clk_basic_init() 550 clock /= (CM_REG_READL(plat, CLKMGR_MAINPLL_PLLC2) & in clk_get_emac_clk_hz()

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