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Searched refs:CLKMGR_MAINPLL_PLLGLOB (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/altera/
A Dclk-agilex.c261 CM_REG_CLRBITS(plat, CLKMGR_MAINPLL_PLLGLOB, in clk_basic_init()
269 CLKMGR_MAINPLL_PLLGLOB); in clk_basic_init()
296 CM_REG_SETBITS(plat, CLKMGR_MAINPLL_PLLGLOB, in clk_basic_init()
321 CM_REG_WRITEL(plat, CM_REG_READL(plat, CLKMGR_MAINPLL_PLLGLOB) | in clk_basic_init()
323 CLKMGR_MAINPLL_PLLGLOB); in clk_basic_init()
381 return clk_get_vco_clk_hz(plat, CLKMGR_MAINPLL_PLLGLOB, in clk_get_main_vco_clk_hz()
A Dclk-agilex.h86 #define CLKMGR_MAINPLL_PLLGLOB 0x48 macro

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