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Searched refs:CLKMGR_MEM_REQ_SET_MSK (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/altera/
A Dclk-agilex.c123 while ((cnt < timeout) && (req_status & CLKMGR_MEM_REQ_SET_MSK)) { in membus_wait_for_req()
145 val = (CLKMGR_MEM_REQ_SET_MSK | CLKMGR_MEM_WR_SET_MSK | in membus_write_pll()
166 val = ((CLKMGR_MEM_REQ_SET_MSK & ~CLKMGR_MEM_WR_SET_MSK) | addr); in membus_read_pll()
A Dclk-agilex.h191 #define CLKMGR_MEM_REQ_SET_MSK BIT(24) macro

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