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Searched refs:CLKMGR_PERPLL_PLLC1 (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/altera/
A Dclk-agilex.h114 #define CLKMGR_PERPLL_PLLC1 0xb0 macro
A Dclk-agilex.c288 CM_REG_WRITEL(plat, cfg->per_pll_pllc1, CLKMGR_PERPLL_PLLC1); in clk_basic_init()
451 CLKMGR_PERPLL_PLLC1); in clk_get_l3_main_clk_hz()

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