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Searched refs:CLKMGR_PLLGLOB_REFCLKDIV_MASK (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-socfpga/
A Dclock_manager_s10.c57 CLKMGR_PLLGLOB_REFCLKDIV_MASK; in cm_basic_init()
84 CLKMGR_PLLGLOB_REFCLKDIV_MASK; in cm_basic_init()
220 CLKMGR_PLLGLOB_REFCLKDIV_MASK; in cm_get_main_vco_clk_hz()
251 CLKMGR_PLLGLOB_REFCLKDIV_MASK; in cm_get_per_vco_clk_hz()
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dclock_manager_s10.h131 #define CLKMGR_PLLGLOB_REFCLKDIV_MASK 0X3f macro
/u-boot/drivers/clk/altera/
A Dclk-agilex.h177 #define CLKMGR_PLLGLOB_REFCLKDIV_MASK GENMASK(13, 8) macro
A Dclk-agilex.c211 refclkdiv = (pllglob & CLKMGR_PLLGLOB_REFCLKDIV_MASK) >> in calc_vocalib_pll()

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