Searched refs:CLK_APMIXED_ARMPLL (Results 1 – 14 of 14) sorted by relevance
| /u-boot/arch/arm/mach-mediatek/mt8516/ |
| A D | init.c | 47 [CLK_APMIXED_ARMPLL] = 1300000000, in mtk_pll_early_init()
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| /u-boot/arch/arm/mach-mediatek/mt7629/ |
| A D | init.c | 33 [CLK_APMIXED_ARMPLL] = 1250000000, in mtk_pll_early_init()
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| /u-boot/include/dt-bindings/clock/ |
| A D | mt8512-clk.h | 186 #define CLK_APMIXED_ARMPLL 0 macro
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| A D | mt7629-clk.h | 159 #define CLK_APMIXED_ARMPLL 0 macro
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| A D | mt8516-clk.h | 14 #define CLK_APMIXED_ARMPLL 0 macro
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| A D | mt7622-clk.h | 163 #define CLK_APMIXED_ARMPLL 0 macro
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| A D | mt8518-clk.h | 11 #define CLK_APMIXED_ARMPLL 0 macro
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| A D | mt7623-clk.h | 177 #define CLK_APMIXED_ARMPLL 0 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7623.c | 46 PLL(CLK_APMIXED_ARMPLL, 0x200, 0x20c, 0x80000001, 0,
169 FACTOR0(CLK_TOP_ARMPLL_1P3G, CLK_APMIXED_ARMPLL, 1, 1),
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| A D | clk-mt8512.c | 42 PLL(CLK_APMIXED_ARMPLL, 0x030C, 0x0318, 0x00000001,
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| A D | clk-mt8516.c | 38 PLL(CLK_APMIXED_ARMPLL, 0x0100, 0x0110, 0x00000001, 0,
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| A D | clk-mt7622.c | 50 PLL(CLK_APMIXED_ARMPLL, 0x200, 0x20c, 0x1, 0,
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| A D | clk-mt7629.c | 50 PLL(CLK_APMIXED_ARMPLL, 0x200, 0x20c, 0x1, 0,
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| A D | clk-mt8518.c | 38 PLL(CLK_APMIXED_ARMPLL, 0x0100, 0x0110, 0x00000001,
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Completed in 22 milliseconds