Searched refs:CLK_APMIXED_AUD1PLL (Results 1 – 4 of 4) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7622-clk.h | 168 #define CLK_APMIXED_AUD1PLL 5 macro
|
| A D | mt7623-clk.h | 183 #define CLK_APMIXED_AUD1PLL 6 macro
|
| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 60 PLL(CLK_APMIXED_AUD1PLL, 0x324, 0x330, 0x1, 0,
133 FACTOR0(CLK_TOP_AUD1PLL, CLK_APMIXED_AUD1PLL, 1, 1),
|
| A D | clk-mt7623.c | 58 PLL(CLK_APMIXED_AUD1PLL, 0x270, 0x27c, 0x00000001, 0,
177 FACTOR0(CLK_TOP_AUD1PLL_98M, CLK_APMIXED_AUD1PLL, 1, 3),
|
Completed in 10 milliseconds