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Searched refs:CLK_APMIXED_AUD2PLL (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt7622-clk.h169 #define CLK_APMIXED_AUD2PLL 6 macro
A Dmt7623-clk.h188 #define CLK_APMIXED_AUD2PLL 11 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt7622.c62 PLL(CLK_APMIXED_AUD2PLL, 0x334, 0x340, 0x1, 0,
134 FACTOR0(CLK_TOP_AUD2PLL, CLK_APMIXED_AUD2PLL, 1, 1),
A Dclk-mt7623.c68 PLL(CLK_APMIXED_AUD2PLL, 0x2c0, 0x2cc, 0x00000001, 0,
178 FACTOR0(CLK_TOP_AUD2PLL_90M, CLK_APMIXED_AUD2PLL, 1, 3),

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